From: Nick Clifton Date: Wed, 4 Aug 2004 13:54:51 +0000 (+0000) Subject: config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the GCC ABI. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2acc29bdd3bc49da5eca42a0f1c014f972e9ef20;p=gcc.git config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the GCC ABI. doc/invoke.texi: Document this new switch and also the -mrenesas switch. From-SVN: r85557 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c6ee6602cea..8cb721f5dfe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-08-04 Nick Clifton + + * config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the + GCC ABI. + * doc/invoke.texi: Document this new switch and also the -mrenesas + switch. + 2004-08-04 Nathan Sidwell * cfglayout.c (insn_locators_initialize): Update the current diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 276bd1e1101..15c19ad0ab7 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -561,6 +561,7 @@ extern int target_flags; {"fmovd", FMOVD_BIT, "" }, \ {"hitachi", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \ {"renesas", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \ + {"no-renesas",-HITACHI_BIT,"Follow the GCC calling conventions" }, \ {"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" }, \ {"ieee", IEEE_BIT, "Increase the IEEE compliance for floating-point code" }, \ {"isize", ISIZE_BIT, "" }, \ diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ce26d58181f..6332839e070 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -626,7 +626,7 @@ See RS/6000 and PowerPC Options. -m5-32media -m5-32media-nofpu @gol -m5-compact -m5-compact-nofpu @gol -mb -ml -mdalign -mrelax @gol --mbigtable -mfmovd -mhitachi -mnomacsave @gol +-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol -mieee -misize -mpadstruct -mspace @gol -mprefergot -musermode} @@ -10585,6 +10585,16 @@ Enable the use of the instruction @code{fmovd}. @opindex mhitachi Comply with the calling conventions defined by Renesas. +@item -mrenesas +@opindex mhitachi +Comply with the calling conventions defined by Renesas. + +@item -mno-renesas +@opindex mhitachi +Comply with the calling conventions defined for GCC before the Renesas +conventions were available. This option is the default for all +targets of the SH toolchain except for @samp{sh-symbianelf}. + @item -mnomacsave @opindex mnomacsave Mark the @code{MAC} register as call-clobbered, even if