From: lkcl <lkcl@web>
Date: Sun, 11 Mar 2018 22:36:45 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~5785
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2adce89d473649a286a83996e41cd27b670ce818;p=libreriscv.git

---

diff --git a/shakti/m_class/pinmux.mdwn b/shakti/m_class/pinmux.mdwn
index b43f5fcda..58752bb61 100644
--- a/shakti/m_class/pinmux.mdwn
+++ b/shakti/m_class/pinmux.mdwn
@@ -88,6 +88,7 @@ Hardware available:
 * <https://github.com/ucb-bar/chisel-tutorial> A brief Chisel tutorial
 * <https://github.com/xfguo/tbgen/blob/master/tbgen.py> auto-generated test module for verilog
 * <https://github.com/kdurant/verilog-testbench> described here <https://www.vim.org/scripts/script.php?script_id=4596>
+* <http://agilesoc.com/open-source-projects/svunit/> - SVunit - unit testing for verilog
 
 # Pinouts Specification