From: Dave Airlie <airlied@redhat.com>
Date: Sat, 6 May 2017 20:14:11 +0000 (+0100)
Subject: radv: apply the tess+GS hang workaround to Polaris12 as well
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2add79a73291e40621081b9a12938ac1931b9e96;p=mesa.git

radv: apply the tess+GS hang workaround to Polaris12 as well

As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 1382272d71b..d94e23b975f 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -672,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
 				if (family == CHIP_TONGA ||
 				    family == CHIP_FIJI ||
 				    family == CHIP_POLARIS10 ||
-				    family == CHIP_POLARIS11)
+				    family == CHIP_POLARIS11 ||
+				    family == CHIP_POLARIS12)
 					partial_vs_wave = true;
 			} else {
 				partial_vs_wave = true;