From: Zhenyu Wang <zhenyuw@linux.intel.com>
Date: Mon, 6 Dec 2010 07:15:55 +0000 (+0800)
Subject: i965: Fix GS state uploading on Sandybridge
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b1469340bbf910469449354eeb5c02a9acfedba;p=mesa.git

i965: Fix GS state uploading on Sandybridge

Need to check the required primitive type for GS on Sandybridge,
and when GS is disabled, the new state has to be issued too, instead
of only updating URB state with no GS entry, that caused hang on Sandybridge.

This fixes hang issue during conformance suite testing.
---

diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index b0c76f4094d..73b41fdbcef 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -166,6 +166,9 @@ static void populate_key( struct brw_context *brw,
 			  struct brw_gs_prog_key *key )
 {
    struct gl_context *ctx = &brw->intel.ctx;
+   struct intel_context *intel = &brw->intel;
+   int prim_gs_always;
+
    memset(key, 0, sizeof(*key));
 
    /* CACHE_NEW_VS_PROG */
@@ -185,10 +188,14 @@ static void populate_key( struct brw_context *brw,
       key->pv_first = GL_TRUE;
    }
 
-   key->need_gs_prog = (key->hint_gs_always ||
-			brw->primitive == GL_QUADS ||
+   if (intel->gen == 6)
+       prim_gs_always = brw->primitive == GL_LINE_LOOP;
+   else
+       prim_gs_always = brw->primitive == GL_QUADS ||
 			brw->primitive == GL_QUAD_STRIP ||
-			brw->primitive == GL_LINE_LOOP);
+			brw->primitive == GL_LINE_LOOP;
+
+   key->need_gs_prog = (key->hint_gs_always || prim_gs_always);
 }
 
 /* Calculate interpolants for triangle and line rasterization.
@@ -205,8 +212,10 @@ static void prepare_gs_prog(struct brw_context *brw)
       brw->gs.prog_active = key.need_gs_prog;
    }
 
+   drm_intel_bo_unreference(brw->gs.prog_bo);
+   brw->gs.prog_bo = NULL;
+
    if (brw->gs.prog_active) {
-      drm_intel_bo_unreference(brw->gs.prog_bo);
       brw->gs.prog_bo = brw_search_cache(&brw->cache, BRW_GS_PROG,
 					 &key, sizeof(key),
 					 NULL, 0,
diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c
index a34123478fb..de97fd3783d 100644
--- a/src/mesa/drivers/dri/i965/gen6_urb.c
+++ b/src/mesa/drivers/dri/i965/gen6_urb.c
@@ -72,7 +72,7 @@ const struct brw_tracked_state gen6_urb = {
    .dirty = {
       .mesa = 0,
       .brw = BRW_NEW_CONTEXT,
-      .cache = CACHE_NEW_VS_PROG,
+      .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG),
    },
    .prepare = prepare_urb,
    .emit = upload_urb,