From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 4 Jul 2019 02:24:36 +0000 (-0400)
Subject: radeonsi/gfx10: enable primitive binning by default
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b2093961eeb7b9d70573fde33eb8b87d5a6f35f;p=mesa.git

radeonsi/gfx10: enable primitive binning by default

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 1f924eaefb4..1070903fa32 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1127,11 +1127,13 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
 					   sscreen->info.chip_class >= GFX10;
 
 	/* Only enable primitive binning on APUs by default. */
-	sscreen->dpbb_allowed = sscreen->info.chip_class >= GFX9 &&
-				!sscreen->info.has_dedicated_vram;
-
-	sscreen->dfsm_allowed = sscreen->info.chip_class >= GFX9 &&
-				!sscreen->info.has_dedicated_vram;
+	if (sscreen->info.chip_class >= GFX10) {
+		sscreen->dpbb_allowed = true;
+		sscreen->dfsm_allowed = !sscreen->info.has_dedicated_vram;
+	} else if (sscreen->info.chip_class == GFX9) {
+		sscreen->dpbb_allowed = !sscreen->info.has_dedicated_vram;
+		sscreen->dfsm_allowed = !sscreen->info.has_dedicated_vram;
+	}
 
 	/* Process DPBB enable flags. */
 	if (sscreen->debug_flags & DBG(DPBB)) {