From: lkcl Date: Wed, 1 Jun 2022 14:19:37 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~2021 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b6a973d3643d831e0155da403caddaa0156a395;p=libreriscv.git --- diff --git a/openpower/sv/svp64_quirks.mdwn b/openpower/sv/svp64_quirks.mdwn index ec64b9429..2543897ca 100644 --- a/openpower/sv/svp64_quirks.mdwn +++ b/openpower/sv/svp64_quirks.mdwn @@ -45,7 +45,17 @@ Power ISA has Condition Register Fields: how can element widths apply there? And branches: how can you have Saturation on something that does not return an arithmetic result? In short: there are actually four different categories (five including those for which Vectorisation -makes no sense at all, such as `sc` or `mtmsr`). +makes no sense at all, such as `sc` or `mtmsr`). The categories are: + +* arithmetic/logical including floating-point +* Load/Store +* Condition Register Field operations +* branch + +Branch is the one and only place where the Scalar +(non-prefixed) operations differ from the Vector (element) +instructions, as explained in a separate section. + # CR weird instructions