From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 16 Jun 2019 13:32:54 +0000 (+0100)
Subject: fix test run errors
X-Git-Tag: div_pipeline~1849
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b7835a7b3d141e44c552d623692853bf1e9d4f1;p=soc.git

fix test run errors
---

diff --git a/src/TLB/ariane/test/test_plru.py b/src/TLB/ariane/test/test_plru.py
index 9b040e1d..b249f549 100644
--- a/src/TLB/ariane/test/test_plru.py
+++ b/src/TLB/ariane/test/test_plru.py
@@ -6,10 +6,10 @@ from plru import PLRU
 
 from nmigen.compat.sim import run_simulation
 
-def testbench(dut):
+def tbench(dut):
     yield
 
 if __name__ == "__main__":
     dut = PLRU(4)
-    run_simulation(dut, testbench(dut), vcd_name="test_plru.vcd")
-    print("PLRU Unit Test Success")
\ No newline at end of file
+    run_simulation(dut, tbench(dut), vcd_name="test_plru.vcd")
+    print("PLRU Unit Test Success")
diff --git a/src/TLB/ariane/test/test_ptw.py b/src/TLB/ariane/test/test_ptw.py
index e9c5324c..3164501d 100644
--- a/src/TLB/ariane/test/test_ptw.py
+++ b/src/TLB/ariane/test/test_ptw.py
@@ -4,7 +4,7 @@ sys.path.append("../../../TestUtil")
 
 from nmigen.compat.sim import run_simulation
 
-from ptw import PTW, PTE
+from TLB.ariane.ptw import PTW, PTE
 
 
 def testbench(dut):
diff --git a/src/TLB/ariane/test/test_tlb.py b/src/TLB/ariane/test/test_tlb.py
index aab1d43c..ef52ba74 100644
--- a/src/TLB/ariane/test/test_tlb.py
+++ b/src/TLB/ariane/test/test_tlb.py
@@ -4,7 +4,7 @@ sys.path.append("../../../TestUtil")
 
 from nmigen.compat.sim import run_simulation
 
-from tlb import TLB
+from TLB.ariane.tlb import TLB
 
 def set_vaddr(addr):
     yield dut.lu_vaddr_i.eq(addr)