From: lkcl <lkcl@web>
Date: Fri, 23 Apr 2021 09:01:23 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~1028
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b80990da90bee0edcc76946aae01b1352787f58;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/decoder.mdwn b/3d_gpu/architecture/decoder.mdwn
index 016a11f99..6fc827030 100644
--- a/3d_gpu/architecture/decoder.mdwn
+++ b/3d_gpu/architecture/decoder.mdwn
@@ -191,8 +191,12 @@ In this way, different sections of the instruction are successively decoded (maj
 
 # second explanation / walkthrough
 
-we (manually) extracted the pseudo-code from the v3.0B specification
-(took 2 days):
+the general idea here is to minimise the actual amount of work
+by using human-and-machine-readable files as much as possible,
+and performing automated translation (compilation) into executable
+form.
+
+we (manually) extracted the pseudo-code from the v3.0B specification:
 <https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/isa/fixedlogical.mdwn;hb=HEAD>
 
 then wrote a parser and language translator (aka compiler) to convert