From: Dmitry Selyutin Date: Thu, 29 Feb 2024 18:32:28 +0000 (+0300) Subject: ppc: support binlog instructions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2b84a8ee7068fdae4886164ee3806420db39d6dc;p=binutils-gdb.git ppc: support binlog instructions --- diff --git a/gas/testsuite/gas/ppc/binlog.d b/gas/testsuite/gas/ppc/binlog.d new file mode 100644 index 00000000000..49071f64a11 --- /dev/null +++ b/gas/testsuite/gas/ppc/binlog.d @@ -0,0 +1,20 @@ +#as: -mlibresoc +#objdump: -dr -Mlibresoc + +.*: file format .* + + +Disassembly of section \.text: +0+ <\.text>: +.*:\s+(5b e0 00 01|01 00 e0 5b)\s+binlog\s+r31,r0,r0,r0,0 +.*:\s+(58 1f 00 01|01 00 1f 58)\s+binlog\s+r0,r31,r0,r0,0 +.*:\s+(58 00 f8 01|01 f8 00 58)\s+binlog\s+r0,r0,r31,r0,0 +.*:\s+(58 00 07 c1|c1 07 00 58)\s+binlog\s+r0,r0,r0,r31,0 +.*:\s+(58 00 00 21|21 00 00 58)\s+binlog\s+r0,r0,r0,r0,1 +.*:\s+(5b 80 00 09|09 00 80 5b)\s+crfbinlog\s+cr7,cr0,cr0,0 +.*:\s+(58 1c 00 09|09 00 1c 58)\s+crfbinlog\s+cr0,cr7,cr0,0 +.*:\s+(58 00 e0 09|09 e0 00 58)\s+crfbinlog\s+cr0,cr0,cr7,0 +.*:\s+(58 63 00 09|09 00 63 58)\s+crfbinlog\s+cr0,cr0,cr0,15 +.*:\s+(5b e0 00 5d|5d 00 e0 5b)\s+crbinlog\s+4\*cr7\+so,lt,cr0 +.*:\s+(58 1f 00 5d|5d 00 1f 58)\s+crbinlog\s+lt,4\*cr7\+so,cr0 +.*:\s+(58 00 e0 5d|5d e0 00 58)\s+crbinlog\s+lt,lt,cr7 diff --git a/gas/testsuite/gas/ppc/binlog.s b/gas/testsuite/gas/ppc/binlog.s new file mode 100644 index 00000000000..b7d48e8b03d --- /dev/null +++ b/gas/testsuite/gas/ppc/binlog.s @@ -0,0 +1,12 @@ +binlog 31,0,0,0,0 +binlog 0,31,0,0,0 +binlog 0,0,31,0,0 +binlog 0,0,0,31,0 +binlog 0,0,0,0,1 +crfbinlog 7,0,0,0 +crfbinlog 0,7,0,0 +crfbinlog 0,0,7,0 +crfbinlog 0,0,0,15 +crbinlog 31,0,0 +crbinlog 0,31,0 +crbinlog 0,0,7 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index e8aedb5e22f..9ae48dce662 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -182,3 +182,4 @@ run_dump_test "ffnmadds" run_dump_test "fdmadds" run_dump_test "ffmadds" run_dump_test "ternlogi" +run_dump_test "binlog" diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index db2e26ed2f1..3ced33aa862 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -2868,7 +2868,7 @@ extract_CRFTLIF (uint64_t insn, } static uint64_t -insert_CRFTLIM (uint64_t insn, +insert_CRBm (uint64_t insn, int64_t value, ppc_cpu_t dialect ATTRIBUTE_UNUSED, const char **errmsg) @@ -2879,7 +2879,7 @@ insert_CRFTLIM (uint64_t insn, } static int64_t -extract_CRFTLIM (uint64_t insn, +extract_CRBm (uint64_t insn, ppc_cpu_t dialect ATTRIBUTE_UNUSED, int *invalid ATTRIBUTE_UNUSED) { @@ -4074,6 +4074,7 @@ const struct powerpc_operand powerpc_operands[] = { 0xf, 22, NULL, NULL, 0 }, #define LBM2 SVo + 1 +#define BLnh LBM2 { 0x1, 5, NULL, NULL, 0 }, #define FMM LBM2 + 1 @@ -4088,10 +4089,10 @@ const struct powerpc_operand powerpc_operands[] = #define CRFTLIF TLIF + 1 { 0xff, PPC_OPSHIFT_INV, insert_CRFTLIF, extract_CRFTLIF, 0 }, -#define CRFTLIM CRFTLIF + 1 - { 0xf, PPC_OPSHIFT_INV, insert_CRFTLIM, extract_CRFTLIM, 0 }, +#define CRBm CRFTLIF + 1 + { 0xf, PPC_OPSHIFT_INV, insert_CRBm, extract_CRBm, 0 }, -#define BFB CRFTLIM + 1 +#define BFB CRBm + 1 { 0x7, 13, NULL, NULL, PPC_OPERAND_CR_REG }, }; @@ -5046,7 +5047,7 @@ const unsigned int num_powerpc_operands = ARRAY_SIZE (powerpc_operands); | (((uint64_t)(rc)) & 1)) #define MMXFMM_MASK MMXFMM (0x3f, 0x3f, 0xf, 0x1) -/* An TLI form instructions */ +/* ternlogi instructions */ #define TLI(op, xop, rc) \ (OP (op) \ | ((((uint64_t)(xop)) & 0x3) << 1) \ @@ -5064,6 +5065,18 @@ const unsigned int num_powerpc_operands = ARRAY_SIZE (powerpc_operands); #define CRFTLI_MASK CRFTLI(0x3f, 0x1f) #define CRTLI_MASK CRTLI(0x3f, 0x7) +/* binlog instructions */ +#define CRFBL(op, xop) \ + (OP (op) \ + | ((((uint64_t)(xop)) & 0x3f))) + +#define CRBL(op, xop) \ + (OP (op) \ + | ((((uint64_t)(xop)) & 0x7ff))) + +#define CRFBL_MASK CRFBL(0x3f, 0x3f) +#define CRBL_MASK CRBL(0x3f, 0x7ff) + /* The BO encodings used in extended conditional branch mnemonics. */ #define BODNZF (0x0) #define BODNZFP (0x1) @@ -6226,7 +6239,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"ternlogi", TLI(5,0,0), TLI_MASK, SFFS, PPCVLE, {RT, RA, RB, TLIF}}, {"ternlogi.", TLI(5,0,1), TLI_MASK, SFFS, PPCVLE, {RT, RA, RB, TLIF}}, -{"crfternlogi", CRFTLI(5,1), CRFTLI_MASK, SFFS, PPCVLE, {BF, BFA, BFB, CRFTLIF, CRFTLIM}}, +{"crfternlogi", CRFTLI(5,1), CRFTLI_MASK, SFFS, PPCVLE, {BF, BFA, BFB, CRFTLIF, CRBm}}, {"crternlogi", CRTLI(5,6), CRTLI_MASK, SFFS, PPCVLE, {BT, BA, BB, TLIF}}, {"lxvp", DQXP(6,0), DQXP_MASK, POWER10, PPCVLE, {XTP, DQ, RA0}}, @@ -7167,6 +7180,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"rlmi", M(22,0), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}}, {"rlmi.", M(22,1), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}}, +{"binlog", BM2(22,1), BM2_MASK, SFFS, PPCVLE, {RT, RA, RB, RC, BLnh}}, +{"crfbinlog", CRFBL(22,9), CRFBL_MASK, SFFS, PPCVLE, {BF, BFA, BFB, CRBm}}, +{"crbinlog", CRBL(22,93), CRBL_MASK, SFFS, PPCVLE, {BT, BA, BFB}}, + {"fmvis", DX(22,3), DX_MASK, SFFS, PPCVLE, {FRS, DXD}}, {"fishmv", DX(22,11), DX_MASK, SFFS, PPCVLE, {FRS, DXD}},