From: Luke Kenneth Casson Leighton Date: Wed, 17 Oct 2018 11:45:12 +0000 (+0100) Subject: add tag X-Git-Tag: convert-csv-opcode-to-binary~4912 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2bf70976a236533778f6b8d01e4f8035d80b9688;p=libreriscv.git add tag --- diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn index 592355dcb..c59f84f6d 100644 --- a/simple_v_extension/specification.mdwn +++ b/simple_v_extension/specification.mdwn @@ -1135,7 +1135,7 @@ Vector "Unit Stride" capable. Just as with uncompressed LOAD/STORE C.LD / C.ST increment the *register* during the hardware loop, **not** the offset. -# Element bitwidth polymorphism +# Element bitwidth polymorphism Element bitwidth is best covered as its own special section, as it is quite involved and applies uniformly across-the-board.