From: Rob Clark <robdclark@chromium.org>
Date: Sat, 28 Mar 2020 18:28:14 +0000 (-0700)
Subject: freedreno/a6xx: add some more tracepoints
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2bf7dba80bb196bbb557e26017a5297c80fe2428;p=mesa.git

freedreno/a6xx: add some more tracepoints

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4366>
---

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 757e7117f75..39e913bfbf7 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -30,6 +30,7 @@
 
 #include "freedreno_blitter.h"
 #include "freedreno_fence.h"
+#include "freedreno_log.h"
 #include "freedreno_resource.h"
 
 #include "fd6_blitter.h"
@@ -648,18 +649,24 @@ handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
 
 	fd_batch_set_stage(batch, FD_STAGE_BLIT);
 
+	fd_log_stream(batch, stream, util_dump_blit_info(stream, info));
+
 	emit_setup(batch);
 
 	if ((info->src.resource->target == PIPE_BUFFER) &&
 			(info->dst.resource->target == PIPE_BUFFER)) {
 		assert(fd_resource(info->src.resource)->layout.tile_mode == TILE6_LINEAR);
 		assert(fd_resource(info->dst.resource)->layout.tile_mode == TILE6_LINEAR);
+		fd_log(batch, "START BLIT (BUFFER)");
 		emit_blit_buffer(ctx, batch->draw, info);
+		fd_log(batch, "END BLIT (BUFFER)");
 	} else {
 		/* I don't *think* we need to handle blits between buffer <-> !buffer */
 		debug_assert(info->src.resource->target != PIPE_BUFFER);
 		debug_assert(info->dst.resource->target != PIPE_BUFFER);
+		fd_log(batch, "START BLIT (TEXTURE)");
 		emit_blit_or_clear_texture(ctx, batch->draw, info, NULL);
+		fd_log(batch, "END BLIT (TEXTURE)");
 	}
 
 	fd6_event_write(batch, batch->draw, PC_CCU_FLUSH_COLOR_TS, true);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 0a73a931794..1793cd1346f 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -32,6 +32,7 @@
 #include "util/format/u_format.h"
 #include "util/u_viewport.h"
 
+#include "freedreno_log.h"
 #include "freedreno_resource.h"
 #include "freedreno_query_hw.h"
 
@@ -1245,6 +1246,8 @@ fd6_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
 {
 	//struct fd_context *ctx = batch->ctx;
 
+	fd_log(batch, "START RESTORE");
+
 	fd6_cache_inv(batch, ring);
 
 	OUT_PKT4(ring, REG_A6XX_HLSQ_UPDATE_CNTL, 1);
@@ -1359,6 +1362,8 @@ fd6_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
 
 	OUT_PKT4(ring, REG_A6XX_RB_LRZ_CNTL, 1);
 	OUT_RING(ring, 0x00000000);
+
+	fd_log(batch, "END RESTORE");
 }
 
 static void
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index e884eb5b311..7722be8d265 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -34,6 +34,7 @@
 #include "util/format/u_format.h"
 
 #include "freedreno_draw.h"
+#include "freedreno_log.h"
 #include "freedreno_state.h"
 #include "freedreno_resource.h"
 
@@ -655,7 +656,9 @@ emit_binning_pass(struct fd_batch *batch)
 			A6XX_SP_TP_WINDOW_OFFSET_Y(0));
 
 	/* emit IB to binning drawcmds: */
+	fd_log(batch, "GMEM: START BINNING IB");
 	fd6_emit_ib(ring, batch->draw);
+	fd_log(batch, "GMEM: END BINNING IB");
 
 	fd_reset_wfi(batch);
 
@@ -675,7 +678,9 @@ emit_binning_pass(struct fd_batch *batch)
 
 	OUT_PKT7(ring, CP_WAIT_FOR_ME, 0);
 
+	fd_log(batch, "START VSC OVERFLOW TEST");
 	emit_vsc_overflow_test(batch);
+	fd_log(batch, "END VSC OVERFLOW TEST");
 
 	OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
 	OUT_RING(ring, 0x0);
@@ -729,8 +734,11 @@ fd6_emit_tile_init(struct fd_batch *batch)
 
 	fd6_emit_lrz_flush(ring);
 
-	if (batch->lrz_clear)
+	if (batch->lrz_clear) {
+		fd_log(batch, "START LRZ CLEAR");
 		fd6_emit_ib(ring, batch->lrz_clear);
+		fd_log(batch, "END LRZ CLEAR");
+	}
 
 	fd6_cache_inv(batch, ring);
 
@@ -1218,11 +1226,13 @@ fd6_emit_tile_mem2gmem(struct fd_batch *batch, const struct fd_tile *tile)
 static void
 fd6_emit_tile_renderprep(struct fd_batch *batch, const struct fd_tile *tile)
 {
+	fd_log(batch, "TILE: START CLEAR/RESTORE");
 	if (batch->fast_cleared || !use_hw_binning(batch)) {
 		fd6_emit_ib(batch->gmem, batch->tile_setup);
 	} else {
 		emit_conditional_ib(batch, tile, batch->tile_setup);
 	}
+	fd_log(batch, "TILE: END CLEAR/RESTORE");
 }
 
 static void
@@ -1354,11 +1364,13 @@ fd6_emit_tile_gmem2mem(struct fd_batch *batch, const struct fd_tile *tile)
 	OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_RESOLVE));
 	emit_marker6(ring, 7);
 
+	fd_log(batch, "TILE: START RESOLVE");
 	if (batch->fast_cleared || !use_hw_binning(batch)) {
 		fd6_emit_ib(batch->gmem, batch->tile_fini);
 	} else {
 		emit_conditional_ib(batch, tile, batch->tile_fini);
 	}
+	fd_log(batch, "TILE: END RESOLVE");
 }
 
 static void