From: Richard Sandiford Date: Tue, 24 Aug 2004 19:35:07 +0000 (+0000) Subject: mips.md (cmpsi, cmpdi): Redefine using :GPR. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2c4402f4d5e5294045c767d1581dfeaf4eda9603;p=gcc.git mips.md (cmpsi, cmpdi): Redefine using :GPR. * config/mips/mips.md (cmpsi, cmpdi): Redefine using :GPR. (*branch_zero[sd]i): Renamed from branch_zero{,_di}. Redefine using :GPR. (*branch_zero[sd]i_inverted): Likewise branch_zero{,_di}_inverted. (*branch_equality[sd]i): Likewise branch_equality{,_di}. (*branch_equality[sd]i_inverted): Likewise branch_equality{,_di}_inverted. (*branch_equality[sd]i_mips16): Name formerly unnamed patterns. Redefine using :GPR. From-SVN: r86507 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index efa8514b331..ea3ff9c8a6d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2004-08-24 Richard Sandiford + + * config/mips/mips.md (cmpsi, cmpdi): Redefine using :GPR. + (*branch_zero[sd]i): Renamed from branch_zero{,_di}. Redefine + using :GPR. + (*branch_zero[sd]i_inverted): Likewise branch_zero{,_di}_inverted. + (*branch_equality[sd]i): Likewise branch_equality{,_di}. + (*branch_equality[sd]i_inverted): Likewise + branch_equality{,_di}_inverted. + (*branch_equality[sd]i_mips16): Name formerly unnamed patterns. + Redefine using :GPR. + 2004-08-24 Zack Weinberg * rtl.def: Reorganize, placing all codes used only in machine diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 2a8ca052a46..0cf81fd5741 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4789,10 +4789,10 @@ beq\t%2,%.,1b\;\ ;; If needed, an appropriate temporary is created to hold the ;; of the integer compare. -(define_expand "cmpsi" +(define_expand "cmp" [(set (cc0) - (compare:CC (match_operand:SI 0 "register_operand") - (match_operand:SI 1 "nonmemory_operand")))] + (compare:CC (match_operand:GPR 0 "register_operand") + (match_operand:GPR 1 "nonmemory_operand")))] "" { cmp_operands[0] = operands[0]; @@ -4800,17 +4800,6 @@ beq\t%2,%.,1b\;\ DONE; }) -(define_expand "cmpdi" - [(set (cc0) - (compare:CC (match_operand:DI 0 "register_operand") - (match_operand:DI 1 "nonmemory_operand")))] - "TARGET_64BIT" -{ - cmp_operands[0] = operands[0]; - cmp_operands[1] = operands[1]; - DONE; -}) - (define_expand "cmpdf" [(set (cc0) (compare:CC (match_operand:DF 0 "register_operand") @@ -4884,54 +4873,14 @@ beq\t%2,%.,1b\;\ ;; Conditional branches on comparisons with zero. -(define_insn "branch_zero" - [(set (pc) - (if_then_else - (match_operator:SI 0 "comparison_operator" - [(match_operand:SI 2 "register_operand" "d") - (const_int 0)]) - (label_ref (match_operand 1 "" "")) - (pc)))] - "!TARGET_MIPS16" -{ - return mips_output_conditional_branch (insn, - operands, - /*two_operands_p=*/0, - /*float_p=*/0, - /*inverted_p=*/0, - get_attr_length (insn)); -} - [(set_attr "type" "branch") - (set_attr "mode" "none")]) - -(define_insn "branch_zero_inverted" - [(set (pc) - (if_then_else - (match_operator:SI 0 "comparison_operator" - [(match_operand:SI 2 "register_operand" "d") - (const_int 0)]) - (pc) - (label_ref (match_operand 1 "" ""))))] - "!TARGET_MIPS16" -{ - return mips_output_conditional_branch (insn, - operands, - /*two_operands_p=*/0, - /*float_p=*/0, - /*inverted_p=*/1, - get_attr_length (insn)); -} - [(set_attr "type" "branch") - (set_attr "mode" "none")]) - -(define_insn "branch_zero_di" +(define_insn "*branch_zero" [(set (pc) (if_then_else - (match_operator:DI 0 "comparison_operator" - [(match_operand:DI 2 "register_operand" "d") - (const_int 0)]) - (label_ref (match_operand 1 "" "")) - (pc)))] + (match_operator:GPR 0 "comparison_operator" + [(match_operand:GPR 2 "register_operand" "d") + (const_int 0)]) + (label_ref (match_operand 1 "" "")) + (pc)))] "!TARGET_MIPS16" { return mips_output_conditional_branch (insn, @@ -4941,17 +4890,17 @@ beq\t%2,%.,1b\;\ /*inverted_p=*/0, get_attr_length (insn)); } - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + [(set_attr "type" "branch") + (set_attr "mode" "none")]) -(define_insn "branch_zero_di_inverted" +(define_insn "*branch_zero_inverted" [(set (pc) (if_then_else - (match_operator:DI 0 "comparison_operator" - [(match_operand:DI 2 "register_operand" "d") - (const_int 0)]) - (pc) - (label_ref (match_operand 1 "" ""))))] + (match_operator:GPR 0 "comparison_operator" + [(match_operand:GPR 2 "register_operand" "d") + (const_int 0)]) + (pc) + (label_ref (match_operand 1 "" ""))))] "!TARGET_MIPS16" { return mips_output_conditional_branch (insn, @@ -4961,19 +4910,19 @@ beq\t%2,%.,1b\;\ /*inverted_p=*/1, get_attr_length (insn)); } - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + [(set_attr "type" "branch") + (set_attr "mode" "none")]) ;; Conditional branch on equality comparison. -(define_insn "branch_equality" +(define_insn "*branch_equality" [(set (pc) (if_then_else - (match_operator:SI 0 "equality_operator" - [(match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d")]) - (label_ref (match_operand 1 "" "")) - (pc)))] + (match_operator:GPR 0 "equality_operator" + [(match_operand:GPR 2 "register_operand" "d") + (match_operand:GPR 3 "register_operand" "d")]) + (label_ref (match_operand 1 "" "")) + (pc)))] "!TARGET_MIPS16" { return mips_output_conditional_branch (insn, @@ -4983,57 +4932,17 @@ beq\t%2,%.,1b\;\ /*inverted_p=*/0, get_attr_length (insn)); } - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + [(set_attr "type" "branch") + (set_attr "mode" "none")]) -(define_insn "branch_equality_di" +(define_insn "*branch_equality_inverted" [(set (pc) (if_then_else - (match_operator:DI 0 "equality_operator" - [(match_operand:DI 2 "register_operand" "d") - (match_operand:DI 3 "register_operand" "d")]) - (label_ref (match_operand 1 "" "")) - (pc)))] - "!TARGET_MIPS16" -{ - return mips_output_conditional_branch (insn, - operands, - /*two_operands_p=*/1, - /*float_p=*/0, - /*inverted_p=*/0, - get_attr_length (insn)); -} - [(set_attr "type" "branch") - (set_attr "mode" "none")]) - -(define_insn "branch_equality_inverted" - [(set (pc) - (if_then_else - (match_operator:SI 0 "equality_operator" - [(match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d")]) - (pc) - (label_ref (match_operand 1 "" ""))))] - "!TARGET_MIPS16" -{ - return mips_output_conditional_branch (insn, - operands, - /*two_operands_p=*/1, - /*float_p=*/0, - /*inverted_p=*/1, - get_attr_length (insn)); -} - [(set_attr "type" "branch") - (set_attr "mode" "none")]) - -(define_insn "branch_equality_di_inverted" - [(set (pc) - (if_then_else - (match_operator:DI 0 "equality_operator" - [(match_operand:DI 2 "register_operand" "d") - (match_operand:DI 3 "register_operand" "d")]) - (pc) - (label_ref (match_operand 1 "" ""))))] + (match_operator:GPR 0 "equality_operator" + [(match_operand:GPR 2 "register_operand" "d") + (match_operand:GPR 3 "register_operand" "d")]) + (pc) + (label_ref (match_operand 1 "" ""))))] "!TARGET_MIPS16" { return mips_output_conditional_branch (insn, @@ -5043,19 +4952,19 @@ beq\t%2,%.,1b\;\ /*inverted_p=*/1, get_attr_length (insn)); } - [(set_attr "type" "branch") - (set_attr "mode" "none")]) + [(set_attr "type" "branch") + (set_attr "mode" "none")]) ;; MIPS16 branches -(define_insn "" +(define_insn "*branch_equality_mips16" [(set (pc) (if_then_else - (match_operator:SI 0 "equality_operator" - [(match_operand:SI 1 "register_operand" "d,t") - (const_int 0)]) - (match_operand 2 "pc_or_label_operand" "") - (match_operand 3 "pc_or_label_operand" "")))] + (match_operator:GPR 0 "equality_operator" + [(match_operand:GPR 1 "register_operand" "d,t") + (const_int 0)]) + (match_operand 2 "pc_or_label_operand" "") + (match_operand 3 "pc_or_label_operand" "")))] "TARGET_MIPS16" { if (operands[2] != pc_rtx) @@ -5073,38 +4982,9 @@ beq\t%2,%.,1b\;\ return "bt%N0z\t%3"; } } - [(set_attr "type" "branch") - (set_attr "mode" "none") - (set_attr "length" "8")]) - -(define_insn "" - [(set (pc) - (if_then_else - (match_operator:DI 0 "equality_operator" - [(match_operand:DI 1 "register_operand" "d,t") - (const_int 0)]) - (match_operand 2 "pc_or_label_operand" "") - (match_operand 3 "pc_or_label_operand" "")))] - "TARGET_MIPS16" -{ - if (operands[2] != pc_rtx) - { - if (which_alternative == 0) - return "b%C0z\t%1,%2"; - else - return "bt%C0z\t%2"; - } - else - { - if (which_alternative == 0) - return "b%N0z\t%1,%3"; - else - return "bt%N0z\t%3"; - } -} - [(set_attr "type" "branch") - (set_attr "mode" "none") - (set_attr "length" "8")]) + [(set_attr "type" "branch") + (set_attr "mode" "none") + (set_attr "length" "8")]) (define_expand "b" [(set (pc)