From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 26 Sep 2023 10:24:57 +0000 (+0100)
Subject: Added  brackets for lha instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2d253675a40ab92a2fce25e2d1de20efab823e81;p=openpower-isa.git

Added  brackets for lha instruction
---

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index b63be01a..14d72840 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -234,7 +234,7 @@ Description:
 
     Let the effective address (EA) be the sum (RA|0)+ D.
     The halfword in storage addressed by EA is loaded into
-    RT48:63. RT 0:47 are filled with a copy of bit 0 of the
+    RT[48:63]. RT[0:47] are filled with a copy of bit 0 of the
     loaded halfword.
 
 Special Registers Altered: