From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 30 Oct 2018 00:45:15 +0000 (+0000)
Subject: set elwidth (carry through) from MMU
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2d268cb76b0090840df0bc922660109d20e02cd8;p=riscv-isa-sim.git

set elwidth (carry through) from MMU
---

diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index ce3db5f..a6dba3a 100644
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -401,6 +401,7 @@ sv_float32_t (sv_proc_t::f32)(sv_freg_t x)
 {
     return ::f32(x);
 }
+
 sv_float32_t (sv_proc_t::f32)(sv_reg_t const& v)
 {
     uint64_t x = v;
@@ -829,7 +830,8 @@ sv_reg_t sv_proc_t::mmu_load(reg_spec_t const& spec, sv_reg_t const& offs,
 
     // now that the address has been moved on by the modulo-offset,
     // get only an elwidth-sized element (if not "default")
-    width = get_bitwidth(_insn->reg_elwidth(spec.reg, true), width);
+    uint8_t rwidth = _insn->reg_elwidth(spec.reg, true);
+    width = get_bitwidth(rwidth, width);
     fprintf(stderr, "mmu_load wid %ld addr %lx offs %lx\n",
                     width, (uint64_t)reg, (int64_t)offs);
     switch (width)
@@ -853,6 +855,8 @@ sv_reg_t sv_proc_t::mmu_load(reg_spec_t const& spec, sv_reg_t const& offs,
     }
     fprintf(stderr, "mmu_load wid %ld addr %lx offs %lx loaded %lx\n",
                     width, (uint64_t)reg, (int64_t)offs, (uint64_t)v);
+    v.set_elwidth(rwidth);
+    v.set_xlen(xlen);
     return v;
 }
 
diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index 839ae02..90a71de 100644
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -148,11 +148,15 @@ public:
     sv_reg_t sv_reg_uint32(sv_reg_t const&);
     sv_reg_t sv_reg_int32(sv_reg_t const&);
 
+    // used in conversion of regs FRSn
     sv_float128_t (f128)(float128_t v);
     sv_float64_t (f64)(sv_freg_t  v);
+    sv_float32_t (f32)(sv_freg_t v);
+
+    // used in conversion of return result from MMU
     sv_float64_t (f64)(sv_reg_t  const&v);
     sv_float32_t (f32)(sv_reg_t  const&v);
-    sv_float32_t (f32)(sv_freg_t v);
+
     sv_reg_t (f32_classify)(sv_float32_t  a);
     sv_reg_t (f64_classify)(sv_float64_t  a);
     sv_reg_t (f128_classify)(sv_float128_t  a);
diff --git a/riscv/sv_reg.h b/riscv/sv_reg.h
index da55fea..22df726 100644
--- a/riscv/sv_reg.h
+++ b/riscv/sv_reg.h
@@ -26,6 +26,8 @@ public:
 public:
   int get_xlen() const { return xlen; }
   uint8_t get_elwidth() const { return elwidth; }
+  void set_elwidth(uint8_t w) { elwidth = w; }
+  void set_xlen(int x) { xlen = x; }
   int get_bitwidth() const
   {
     return ::get_bitwidth(elwidth, xlen);