From: Nilay Vaish Date: Wed, 11 Jan 2012 19:39:58 +0000 (-0600) Subject: Ruby Port: Add a list of cpu ports attached to this port X-Git-Tag: stable_2012_06_28~275^2~12 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2d3cae02f5d4a6c1f116f922d0ee3dde9e9dcc77;p=gem5.git Ruby Port: Add a list of cpu ports attached to this port --- diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index f7bde739e..d5f21c312 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -66,8 +66,10 @@ Port * RubyPort::getPort(const std::string &if_name, int idx) { if (if_name == "port") { - return new M5Port(csprintf("%s-port%d", name(), idx), this, - ruby_system, access_phys_mem); + M5Port* cpuPort = new M5Port(csprintf("%s-port%d", name(), idx), + this, ruby_system, access_phys_mem); + cpu_ports.push_back(cpuPort); + return cpuPort; } if (if_name == "pio_port") { diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh index 88e865766..0160d8fc8 100644 --- a/src/mem/ruby/system/RubyPort.hh +++ b/src/mem/ruby/system/RubyPort.hh @@ -148,6 +148,10 @@ class RubyPort : public MemObject M5Port* physMemPort; + /*! Vector of CPU Port attached to this Ruby port. */ + typedef std::vector::iterator CpuPortIter; + std::vector cpu_ports; + PhysicalMemory* physmem; RubySystem* ruby_system;