From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 10 Mar 2020 17:29:24 +0000 (-0700)
Subject: verilog: also set location for simple_behavioral_stmt
X-Git-Tag: working-ls180~753^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2d63bf5877a99ad5a83be35b5bdc0702a947d456;p=yosys.git

verilog: also set location for simple_behavioral_stmt
---

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 0dd4e0f61..a558325c3 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -2113,18 +2113,22 @@ simple_behavioral_stmt:
 	lvalue '=' delay expr {
 		AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, $4);
 		ast_stack.back()->children.push_back(node);
+		SET_AST_NODE_LOC(node, @1, @4);
 	} |
 	lvalue TOK_INCREMENT {
 		AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_ADD, $1->clone(), AstNode::mkconst_int(1, true)));
 		ast_stack.back()->children.push_back(node);
+		SET_AST_NODE_LOC(node, @1, @2);
 	} |
 	lvalue TOK_DECREMENT {
 		AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_SUB, $1->clone(), AstNode::mkconst_int(1, true)));
 		ast_stack.back()->children.push_back(node);
+		SET_AST_NODE_LOC(node, @1, @2);
 	} |
 	lvalue OP_LE delay expr {
 		AstNode *node = new AstNode(AST_ASSIGN_LE, $1, $4);
 		ast_stack.back()->children.push_back(node);
+		SET_AST_NODE_LOC(node, @1, @4);
 	};
 
 // this production creates the obligatory if-else shift/reduce conflict