From: Sandipan Das Date: Sat, 6 Feb 2021 11:52:07 +0000 (+0530) Subject: arch-power: Add fields for MD and MDS form instructions X-Git-Tag: develop-gem5-snapshot~19 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2d79b3ce94e8a7ad8d9007a5b5f5d343744bcdba;p=gem5.git arch-power: Add fields for MD and MDS form instructions This introduces the extended opcode fields for MD and MDS form instructions and the mb and me fields which are concatenated with the MB and ME fields respectively for specifying mask bounds for doubleword operands. Change-Id: I2c3366794ed42f5d31ba1d69e360c0ac67c74e06 Signed-off-by: Sandipan Das --- diff --git a/src/arch/power/isa/bitfields.isa b/src/arch/power/isa/bitfields.isa index dfe4683dc..3bfea5306 100644 --- a/src/arch/power/isa/bitfields.isa +++ b/src/arch/power/isa/bitfields.isa @@ -38,6 +38,8 @@ def bitfield PO <31:26>; def bitfield A_XO <5:1>; def bitfield DS_XO <1:0>; def bitfield DX_XO <5:1>; +def bitfield MD_XO <4:2>; +def bitfield MDS_XO <4:1>; def bitfield VA_XO <5:0>; def bitfield X_XO <10:1>; def bitfield XFL_XO <10:1>; diff --git a/src/arch/power/types.hh b/src/arch/power/types.hh index 8ba09f23b..74cd7b43a 100644 --- a/src/arch/power/types.hh +++ b/src/arch/power/types.hh @@ -48,7 +48,9 @@ BitUnion32(ExtMachInst) Bitfield<15, 11> sh; Bitfield<1> shn; Bitfield<10, 6> mb; + Bitfield<5> mbn; Bitfield< 5, 1> me; + Bitfield<5> men; // Immediate fields Bitfield<15, 0> si;