From: Luke Kenneth Casson Leighton Date: Sun, 30 Apr 2023 19:00:53 +0000 (+0100) Subject: ffmsubs number of operands reduced to match ffmadds X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2e04f815db2f01b5b68f102fce2dea6e0fdb0bab;p=openpower-isa.git ffmsubs number of operands reduced to match ffmadds --- diff --git a/openpower/isa/svfparith.mdwn b/openpower/isa/svfparith.mdwn index 49b43f4f..6579042b 100644 --- a/openpower/isa/svfparith.mdwn +++ b/openpower/isa/svfparith.mdwn @@ -203,13 +203,14 @@ Special Registers Altered: A-Form -* ffmsubs FRT,FRA,FRC,FRB (Rc=0) -* ffmsubs. FRT,FRA,FRC,FRB (Rc=1) +* ffmsubs FRT,FRA,FRB (Rc=0) +* ffmsubs. FRT,FRA,FRB (Rc=1) Pseudo-code: - FRT <- FPMULADD32(FRA, FRC, FRB, 1, -1) - FRS <- FPMULADD32(FRA, FRC, FRB, -1, -1) + tmp <- FRT + FRT <- FPMULADD32(tmp, FRA, FRB, 1, -1) + FRS <- FPMULADD32(tmp, FRA, FRB, -1, -1) Special Registers Altered: diff --git a/openpower/isatables/minor_59.csv b/openpower/isatables/minor_59.csv index cf8622f8..615b2b97 100644 --- a/openpower/isatables/minor_59.csv +++ b/openpower/isatables/minor_59.csv @@ -14,7 +14,7 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou -----11101,FPU,OP_FP_MADD,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,fmadds,A,,, -----11110,FPU,OP_FP_MADD,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,fnmsubs,A,,, -----11111,FPU,OP_FP_MADD,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,fnmadds,A,,, ------00100,FPU,OP_FP_MADD,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,ffmsubs,A,,1,3-in 2-out: implicit FRS. unofficial until submitted and approved/renumbered by the opf isa wg +-----00100,FPU,OP_FP_MADD,FRT,FRB,FRA,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,ffmsubs,A,,1,3-in 2-out: implicit FRS. unofficial until submitted and approved/renumbered by the opf isa wg -----00101,FPU,OP_FP_MADD,FRT,FRB,FRA,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,ffmadds,A,,1,3-in 2-out: implicit FRS. unofficial until submitted and approved/renumbered by the opf isa wg -----00110,FPU,OP_FP_MADD,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,ffnmsubs,A,,1,3-in 2-out: implicit FRS. unofficial until submitted and approved/renumbered by the opf isa wg -----00111,FPU,OP_FP_MADD,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,ffnmadds,A,,1,3-in 2-out: implicit FRS. unofficial until submitted and approved/renumbered by the opf isa wg