From: Gavin Romig-Koch Date: Tue, 29 Dec 1998 15:46:59 +0000 (+0000) Subject: * config/tc-mips.c (append_insn): For mips16, insert a nop between X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2e23624e62d1b5a1967deee01b59755fd396762d;p=binutils-gdb.git * config/tc-mips.c (append_insn): For mips16, insert a nop between a read of HI or LO and an immediatly following branch. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 8b74eb28a8d..c3b7408cb86 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +1998-12-29 Gavin Romig-Koch + + * config/tc-mips.c (append_insn): For mips16, insert a nop between + a read of HI or LO and an immediatly following branch. + 1998-12-29 Gavin Romig-Koch * config/tc-mips.c (md_begin): Another correction to the setting of diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index a2e1afe3c4b..26b12e30cb8 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -1689,6 +1689,16 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) && (mips_optimize == 0 || (pinfo & INSN_WRITE_LO))) nops += 2; + /* Most mips16 branch insns don't have a delay slot. + If a read from LO is immediately followed by a branch + to a write to LO we have a read followed by a write + less than 2 insns away. We assume the target of + a branch might be a write to LO, and insert a nop + between a read and an immediately following branch. */ + else if (mips_opts.mips16 + && (mips_optimize == 0 + || (pinfo & MIPS16_INSN_BRANCH))) + nops += 1; } else if (prev_insn.insn_mo->pinfo & INSN_READ_HI) { @@ -1701,6 +1711,16 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) && (mips_optimize == 0 || (pinfo & INSN_WRITE_HI))) nops += 2; + /* Most mips16 branch insns don't have a delay slot. + If a read from HI is immediately followed by a branch + to a write to HI we have a read followed by a write + less than 2 insns away. We assume the target of + a branch might be a write to HI, and insert a nop + between a read and an immediately following branch. */ + else if (mips_opts.mips16 + && (mips_optimize == 0 + || (pinfo & MIPS16_INSN_BRANCH))) + nops += 1; } /* If the previous instruction was in a noreorder section, then