From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 22 Jan 2020 12:25:20 +0000 (+0000)
Subject: add partitioned signal class
X-Git-Tag: ls180-24jan2020~351
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2e56a21f1807c731776707262e2f2d5a9f8f96a8;p=ieee754fpu.git

add partitioned signal class
---

diff --git a/src/ieee754/part/partsig.py b/src/ieee754/part/partsig.py
new file mode 100644
index 00000000..252beb4d
--- /dev/null
+++ b/src/ieee754/part/partsig.py
@@ -0,0 +1,25 @@
+"""
+Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
+
+dynamic-partitionable class similar to Signal, which, when the partition
+is fully open will be identical to Signal.  when partitions are closed,
+the class turns into a SIMD variant of Signal.  *this is dynamic*.
+
+http://bugs.libre-riscv.org/show_bug.cgi?id=132
+"""
+
+from nmigen import (Module, Signal, Elaboratable,
+                    )
+
+class PartitionedSignal(Elaboratable):
+    def __init__(self, partition_points, *args, **kwargs)
+                 reset=0, reset_less=False,
+                 attrs=None, decoder=None, src_loc_at=0):
+        self.partpoints = partition_points
+        self.sig = Signal(*args, **kwargs)
+
+    def elaboratable(self, platform):
+        self.m = m = Module()
+        return m
+
+