From: Alan Modra <amodra@gmail.com>
Date: Wed, 1 Jan 2020 08:16:43 +0000 (+1030)
Subject: ubsan: d30v: left shift cannot be represented in type 'int'
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2e98c6c5c5a0d8746f3815ceeb7564acaa0645e1;p=binutils-gdb.git

ubsan: d30v: left shift cannot be represented in type 'int'

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fb9f9e0929e..52ebe868cc9 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-01-04  Alan Modra  <amodra@gmail.com>
+
+	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
+
 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 
 	* aarch64-tbl.h (aarch64_opcode_table): Use
diff --git a/opcodes/d30v-dis.c b/opcodes/d30v-dis.c
index 61bb16d6d25..212d24a7083 100644
--- a/opcodes/d30v-dis.c
+++ b/opcodes/d30v-dis.c
@@ -271,14 +271,10 @@ print_insn (struct disassemble_info *info,
 	  /* IMM6S3 is unsigned.  */
 	  if (oper->flags & OPERAND_SIGNED || bits == 32)
 	    {
-	      long max;
-	      max = (1 << (bits - 1));
-	      if (val & max)
+	      unsigned int sign = 1u << (bits - 1);
+	      if (val & sign)
 		{
-		  if (bits == 32)
-		    val = -val;
-		  else
-		    val = -val & ((1 << bits) - 1);
+		  val = -val & (sign + sign - 1);
 		  neg = 1;
 		}
 	    }
@@ -303,13 +299,11 @@ print_insn (struct disassemble_info *info,
 	{
 	  if (oper->flags & OPERAND_SIGNED)
 	    {
-	      int max = (1 << (bits - 1));
+	      unsigned int sign = 1u << (bits - 1);
 
-	      if (val & max)
+	      if (val & sign)
 		{
-		  val = -val;
-		  if (bits < 32)
-		    val &= ((1 << bits) - 1);
+		  val = -val & (sign + sign - 1);
 		  (*info->fprintf_func) (info->stream, "-");
 		}
 	    }