From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 26 Jul 2020 13:16:15 +0000 (+0100)
Subject: add test_nop general test case
X-Git-Tag: semi_working_ecp5~519
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2eba3e03c360947e3e73acc788a1ad4be11b9381;p=soc.git

add test_nop general test case
---

diff --git a/src/soc/simulator/test_sim.py b/src/soc/simulator/test_sim.py
index 30045ac6..b506b4f7 100644
--- a/src/soc/simulator/test_sim.py
+++ b/src/soc/simulator/test_sim.py
@@ -203,6 +203,15 @@ class GeneralTestCases(FHDLTestCase):
         with Program(lst, bigendian) as program:
             self.run_tst_program(program, [1, 2, 3, 4], initial_mem)
 
+    def test_nop(self):
+        lst = ["addi 1, 0, 0x1004",
+               "nop",
+               "addi 3, 0, 0x15eb",
+              ]
+        initial_regs = [0] * 32
+        with Program(lst, bigendian) as program:
+            self.run_tst_program(program, [1, 3])
+
     def test_loop(self):
         """in godbolt.org:
         register unsigned long i asm ("r12");