From: Eric Anholt Date: Wed, 20 Nov 2019 21:17:27 +0000 (-0800) Subject: freedreno: Introduce a fd_resource_tile_mode() helper. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2ec420b2646974c0c11c763e58c859751feaeb88;p=mesa.git freedreno: Introduce a fd_resource_tile_mode() helper. Multiple places were doing the same thing to get the tile mode of a level, so refactor it out. This will make the shared resource helper transition cleaner. Acked-by: Rob Clark --- diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c index 8fdf4c47c31..c3db9b983cd 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_blitter.c @@ -342,10 +342,8 @@ emit_blit(struct fd_ringbuffer *ring, const struct pipe_blit_info *info) sfmt = fd5_pipe2color(info->src.format); dfmt = fd5_pipe2color(info->dst.format); - stile = fd_resource_level_linear(info->src.resource, info->src.level) ? - TILE5_LINEAR : src->tile_mode; - dtile = fd_resource_level_linear(info->dst.resource, info->dst.level) ? - TILE5_LINEAR : dst->tile_mode; + stile = fd_resource_tile_mode(info->src.resource, info->src.level); + dtile = fd_resource_tile_mode(info->dst.resource, info->dst.level); sswap = fd5_pipe2swap(info->src.format); dswap = fd5_pipe2swap(info->dst.format); diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c index 9e2b48b1af1..12b00b80f26 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c @@ -92,8 +92,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, stride = slice->pitch * rsc->cpp; size = slice->size0; - if (!fd_resource_level_linear(psurf->texture, psurf->u.tex.level)) - tile_mode = rsc->tile_mode; + tile_mode = fd_resource_tile_mode(psurf->texture, psurf->u.tex.level); } } @@ -632,8 +631,7 @@ emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base, OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_PITCH */ OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_ARRAY_PITCH */ - tiled = rsc->tile_mode && - !fd_resource_level_linear(psurf->texture, psurf->u.tex.level); + tiled = fd_resource_tile_mode(psurf->texture, psurf->u.tex.level); OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_3, 5); OUT_RING(ring, 0x00000004 | /* XXX RB_RESOLVE_CNTL_3 */ diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_resource.c b/src/gallium/drivers/freedreno/a5xx/fd5_resource.c index efd699c0060..9b1a4927308 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_resource.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_resource.c @@ -64,11 +64,10 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format forma for (level = 0; level <= prsc->last_level; level++) { struct fd_resource_slice *slice = fd_resource_slice(rsc, level); - bool linear_level = fd_resource_level_linear(prsc, level); uint32_t aligned_height = height; uint32_t blocks; - if (rsc->tile_mode && !linear_level) { + if (fd_resource_tile_mode(prsc, level)) { pitchalign = tile_alignment[rsc->cpp].pitchalign; aligned_height = align(aligned_height, heightalign); } else { diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c index 39c5ee6f339..bb146ed80e2 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c @@ -380,10 +380,8 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring, int blockheight = util_format_get_blockheight(info->src.format); int nelements; - stile = fd_resource_level_linear(info->src.resource, info->src.level) ? - TILE6_LINEAR : src->tile_mode; - dtile = fd_resource_level_linear(info->dst.resource, info->dst.level) ? - TILE6_LINEAR : dst->tile_mode; + stile = fd_resource_tile_mode(info->src.resource, info->src.level); + dtile = fd_resource_tile_mode(info->dst.resource, info->dst.level); sswap = stile ? WZYX : fd6_pipe2swap(info->src.format); dswap = dtile ? WZYX : fd6_pipe2swap(info->dst.format); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index 1b8bea6f684..2b2f9b8c66e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -100,11 +100,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, stride = slice->pitch * rsc->cpp * pfb->samples; swap = rsc->tile_mode ? WZYX : fd6_pipe2swap(pformat); - if (rsc->tile_mode && - fd_resource_level_linear(psurf->texture, psurf->u.tex.level)) - tile_mode = TILE6_LINEAR; - else - tile_mode = rsc->tile_mode; + tile_mode = fd_resource_tile_mode(psurf->texture, psurf->u.tex.level); if (psurf->u.tex.first_layer < psurf->u.tex.last_layer) { layered = true; @@ -999,13 +995,7 @@ emit_blit(struct fd_batch *batch, enum a3xx_color_swap swap = rsc->tile_mode ? WZYX : fd6_pipe2swap(pfmt); enum a3xx_msaa_samples samples = fd_msaa_samples(rsc->base.nr_samples); - uint32_t tile_mode; - - if (rsc->tile_mode && - fd_resource_level_linear(&rsc->base, psurf->u.tex.level)) - tile_mode = TILE6_LINEAR; - else - tile_mode = rsc->tile_mode; + uint32_t tile_mode = fd_resource_tile_mode(&rsc->base, psurf->u.tex.level); OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 5); OUT_RING(ring, diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_image.c b/src/gallium/drivers/freedreno/a6xx/fd6_image.c index c790ee6c5cb..92dab0f0c9a 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_image.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_image.c @@ -232,13 +232,9 @@ fd6_emit_ssbo_tex(struct fd_ringbuffer *ring, const struct pipe_shader_buffer *p static void emit_image_ssbo(struct fd_ringbuffer *ring, struct fd6_image *img) { struct fd_resource *rsc = fd_resource(img->prsc); - enum a6xx_tile_mode tile_mode = TILE6_LINEAR; + enum a6xx_tile_mode tile_mode = fd_resource_tile_mode(img->prsc, img->level); bool ubwc_enabled = fd_resource_ubwc_enabled(rsc, img->level); - if (rsc->tile_mode && !fd_resource_level_linear(img->prsc, img->level)) { - tile_mode = rsc->tile_mode; - } - OUT_RING(ring, A6XX_IBO_0_FMT(img->fmt) | A6XX_IBO_0_TILE_MODE(tile_mode)); OUT_RING(ring, A6XX_IBO_1_WIDTH(img->width) | diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c index b52a7bbb439..89cf395b77b 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c @@ -85,11 +85,11 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format forma for (level = 0; level <= prsc->last_level; level++) { struct fd_resource_slice *slice = fd_resource_slice(rsc, level); - bool linear_level = fd_resource_level_linear(prsc, level); + uint32_t tile_mode = fd_resource_tile_mode(prsc, level); uint32_t width, height; /* tiled levels of 3D textures are rounded up to PoT dimensions: */ - if ((prsc->target == PIPE_TEXTURE_3D) && rsc->tile_mode && !linear_level) { + if ((prsc->target == PIPE_TEXTURE_3D) && tile_mode) { width = twidth; height = theight; } else { @@ -99,7 +99,7 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format forma uint32_t aligned_height = height; uint32_t blocks; - if (rsc->tile_mode && !linear_level) { + if (tile_mode) { pitchalign = tile_alignment[ta].pitchalign; aligned_height = align(aligned_height, tile_alignment[ta].heightalign); diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h index 1d3931b2a03..14c06ded44c 100644 --- a/src/gallium/drivers/freedreno/freedreno_resource.h +++ b/src/gallium/drivers/freedreno/freedreno_resource.h @@ -202,11 +202,20 @@ fd_resource_level_linear(const struct pipe_resource *prsc, int level) return false; } +static inline uint32_t +fd_resource_tile_mode(struct pipe_resource *prsc, int level) +{ + struct fd_resource *rsc = fd_resource(prsc); + if (rsc->tile_mode && fd_resource_level_linear(&rsc->base, level)) + return 0; /* linear */ + else + return rsc->tile_mode; +} + static inline bool fd_resource_ubwc_enabled(struct fd_resource *rsc, int level) { - return rsc->ubwc_size && rsc->tile_mode && - !fd_resource_level_linear(&rsc->base, level); + return rsc->ubwc_size && fd_resource_tile_mode(&rsc->base, level); } /* access # of samples, with 0 normalized to 1 (which is what we care about