From: H.J. Lu <hongjiu.lu@intel.com>
Date: Wed, 15 May 2019 15:21:04 +0000 (+0000)
Subject: i386: Emulate MMX movntq with SSE2 movntidi
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2ed7ae1641c2e3c96f7ca4f7c940399793408921;p=gcc.git

i386: Emulate MMX movntq with SSE2 movntidi

Emulate MMX movntq with SSE2 movntidi.  Only register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (sse_movntq): Add SSE2 emulation.

From-SVN: r271238
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 84cf0aabff1..01cdde4faf2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/89021
+	* config/i386/mmx.md (sse_movntq): Add SSE2 emulation.
+
 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR target/89021
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 15fd355eeb2..6cc9547d266 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -239,12 +239,16 @@
 })
 
 (define_insn "sse_movntq"
-  [(set (match_operand:DI 0 "memory_operand" "=m")
-	(unspec:DI [(match_operand:DI 1 "register_operand" "y")]
+  [(set (match_operand:DI 0 "memory_operand" "=m,m")
+	(unspec:DI [(match_operand:DI 1 "register_operand" "y,r")]
 		   UNSPEC_MOVNTQ))]
-  "TARGET_SSE || TARGET_3DNOW_A"
-  "movntq\t{%1, %0|%0, %1}"
-  [(set_attr "type" "mmxmov")
+  "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+   && (TARGET_SSE || TARGET_3DNOW_A)"
+  "@
+   movntq\t{%1, %0|%0, %1}
+   movnti\t{%1, %0|%0, %1}"
+  [(set_attr "mmx_isa" "native,x64")
+   (set_attr "type" "mmxmov,ssemov")
    (set_attr "mode" "DI")])
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;