From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Mon, 19 Oct 2009 15:47:29 +0000 (+0200)
Subject: nv50: implement TGSI_OPCODE_CMP
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2eef2017acbbb617c559555648c7745141f3aedb;p=mesa.git

nv50: implement TGSI_OPCODE_CMP
---

diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 1bd6f717d10..3b7033b5180 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -506,11 +506,13 @@ emit_mov(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
 {
 	struct nv50_program_exec *e = exec(pc);
 
-	e->inst[0] |= 0x10000000;
+	e->inst[0] = 0x10000000;
+	if (!pc->allow32)
+		set_long(pc, e);
 
 	set_dst(pc, dst, e);
 
-	if (pc->allow32 && dst->type != P_RESULT && src->type == P_IMMD) {
+	if (!is_long(e) && src->type == P_IMMD) {
 		set_immd(pc, src, e);
 		/*XXX: 32-bit, but steals part of "half" reg space - need to
 		 *     catch and handle this case if/when we do half-regs
@@ -1696,6 +1698,18 @@ nv50_program_tx_insn(struct nv50_pc *pc,
 				 CVTOP_CEIL, CVT_F32_F32 | CVT_RI);
 		}
 		break;
+	case TGSI_OPCODE_CMP:
+		pc->allow32 = FALSE;
+		for (c = 0; c < 4; c++) {
+			if (!(mask & (1 << c)))
+				continue;
+			emit_cvt(pc, NULL, src[0][c], 1, CVTOP_RN, CVT_F32_F32);
+			emit_mov(pc, dst[c], src[1][c]);
+			set_pred(pc, 0x1, 1, pc->p->exec_tail); /* @SF */
+			emit_mov(pc, dst[c], src[2][c]);
+			set_pred(pc, 0x6, 1, pc->p->exec_tail); /* @NSF */
+		}
+		break;
 	case TGSI_OPCODE_COS:
 		if (mask & 8) {
 			emit_precossin(pc, temp, src[0][3]);