From: lkcl <lkcl@web>
Date: Sat, 3 Mar 2018 08:54:37 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~5823
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f019ae372a9ee57c8341eb3813862f461f0faeb;p=libreriscv.git

---

diff --git a/shakti/m_class/PWM.mdwn b/shakti/m_class/PWM.mdwn
index 204f5bb99..9719bf082 100644
--- a/shakti/m_class/PWM.mdwn
+++ b/shakti/m_class/PWM.mdwn
@@ -1,3 +1,8 @@
 # PWM
 
-TODO
+* <http://bugs.libre-riscv.org/show_bug.cgi?id=13>
+* <https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/>
+  includes GPIO, SPI, UART, JTAG, I2C, PinCtrl, UART and PWM.  Also included
+  is a Watchdog Timer and others.
+* <https://opencores.org/project,ss_pcm>
+