From: Luke Kenneth Casson Leighton Date: Fri, 8 May 2020 09:50:52 +0000 (+0100) Subject: [libre-riscv-dev] minimum viable ASIC X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f1a7c19bfbd6ff123227910bb6ca9a5d4a327ea;p=libre-riscv-dev.git [libre-riscv-dev] minimum viable ASIC --- diff --git a/65/caadd70093e4ac9e8cb7d606a0cc4e4d168324 b/65/caadd70093e4ac9e8cb7d606a0cc4e4d168324 new file mode 100644 index 0000000..3bdbd1b --- /dev/null +++ b/65/caadd70093e4ac9e8cb7d606a0cc4e4d168324 @@ -0,0 +1,112 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 08 May 2020 10:51:27 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jWzfC-0000C4-7T; Fri, 08 May 2020 10:51:26 +0100 +Received: from lkcl.net ([217.147.94.29]) + by libre-soc.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.89) (envelope-from ) id 1jWzfB-0000By-K1 + for libre-riscv-dev@lists.libre-riscv.org; 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