From: Michael Collison Date: Wed, 12 Jul 2017 02:18:06 +0000 (+0000) Subject: aarch64-simd.md (aarch64_sub_compare0): New pattern. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f65ab2e179b5ac8458940dc204d6415349126ca;p=gcc.git aarch64-simd.md (aarch64_sub_compare0): New pattern. 2017-07-11 Michael Collison * config/aarch64/aarch64-simd.md(aarch64_sub_compare0): New pattern. * testsuite/gcc.target/aarch64/cmp-2.c: New testcase. From-SVN: r250148 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2e88291add3..e3d096ccc5e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-07-11 Michael Collison + + * config/aarch64/aarch64-simd.md (aarch64_sub_compare0): + New pattern. + 2017-07-11 Carl Love * config/rs6000/rs6000-c.c: Add support for builtins diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index e6e7e64390c..f876a2b7208 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1905,6 +1905,17 @@ [(set_attr "type" "alus_sreg,alus_imm,alus_imm")] ) +(define_insn "aarch64_sub_compare0" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (minus:GPI (match_operand:GPI 0 "register_operand" "r") + (match_operand:GPI 1 "aarch64_plus_operand" "r")) + (const_int 0)))] + "" + "cmp\\t%0, %1" + [(set_attr "type" "alus_sreg")] +) + (define_insn "*compare_neg" [(set (reg:CC_Z CC_REGNUM) (compare:CC_Z diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a5721e9fa64..78bcef9bd7a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-07-11 Michael Collison + + * testsuite/gcc.target/aarch64/cmp-2.c: New testcase. + 2017-07-11 Paolo Carlini PR c++/51270 diff --git a/gcc/testsuite/gcc.target/aarch64/cmp-2.c b/gcc/testsuite/gcc.target/aarch64/cmp-2.c new file mode 100644 index 00000000000..12016647061 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/cmp-2.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int lt (int x, int y) +{ + if ((x - y) < 0) + return 10; + + return 0; +} + +int ge (int x, int y) +{ + if ((x - y) >= 0) + return 10; + + return 0; +} + +/* { dg-final { scan-assembler-times "csel\t" 2 } } */ +/* { dg-final { scan-assembler-not "sub\t" } } */