From: Sebastien Bourdeauducq Date: Tue, 8 Apr 2014 15:11:27 +0000 (+0200) Subject: update README X-Git-Tag: 24jan2021_ls180~2733 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f6f584adbd7eb58e86d9f43b4356fba6e3cf8d6;p=litex.git update README --- diff --git a/LICENSE b/LICENSE index 70a79f87..80a1768c 100644 --- a/LICENSE +++ b/LICENSE @@ -1,4 +1,4 @@ -Unless otherwise noted, MiSoC is copyright (C) 2011-2013 Sebastien Bourdeauducq. +Unless otherwise noted, MiSoC is copyright (C) 2011-2014 Sebastien Bourdeauducq. All rights reserved. Redistribution and use in source and binary forms, with or without modification, diff --git a/README b/README index fb3d939e..3a1c6d28 100644 --- a/README +++ b/README @@ -1,61 +1,76 @@ -[> MiSoC system-on-chip ------------------------------- + __ ___ _ ____ _____ + / |/ / (_) / __/__ / ___/ + / /|_/ / / / _\ \/ _ \/ /__ + /_/ /_/ /_/ /___/\___/\___/ -A high performance and small footprint system-on-chip design based on Migen. +a high performance and small footprint SoC based on Migen -MiSoC supports the Mixxeo and the Milkymist One. -Obtain your development system at http://m-labs.hk -[> Instructions (software) --------------------------- -1. Compile and install binutils. Take the latest version from GNU. +[> Features +----------- + * LatticeMico32 CPU, modified to include an optional MMU (experimental). + * High performance memory controller capable of issuing several SDRAM commands per FPGA cycle. + * Supports SDR, DDR, LPDDR and DDR2. + * Provided peripherals: UART, GPIO, timer, GPIO, NOR flash controller, SPI flash controller, + Ethernet MAC, and more. + * High performance: on Spartan-6, 83MHz system clock frequencies, 10+Gbps DDR SDRAM bandwidth, + 1080p 32bpp framebuffer, etc. + * Low resource usage: basic implementation fits easily in Spartan-6 LX9. + * Portable and easy to customize thanks to Python- and Migen-based architecture. + * Design new peripherals using Migen and benefit from automatic CSR maps and logic, etc. + * Possibility to encapsulate legacy Verilog/VHDL code. + +MiSoC comes with built-in support for the following boards: + * Mixxeo, the digital video mixer from M-Labs [XC6SLX45] + * Milkymist One, the original M-Labs video synthesizer [XC6SLX45] + * Papilio Pro, a simple and low-cost development board [XC6SLX9] +MiSoC is portable and support for other boards can easily be added as external modules. + +[> Quick start guide +-------------------- +1. Install Python 3.3+, Migen and FPGA vendor's development tools. + Get Migen from: https://github.com/m-labs/migen + +2. Install JTAG tools. + For Mixxeo and M1: http://urjtag.org + For Papilio Pro: http://xc3sprog.sourceforge.net + +3. Obtain and build any required flash proxy bitstreams. Flash proxy bitstreams give JTAG access + to a flash chip through the FPGA. + For Mixxeo and M1: https://github.com/m-labs/fjmem-m1 + For Papilio Pro: https://github.com/GadgetFactory/Papilio-Loader + (xc3sprog/trunk/bscan_spi/bscan_spi_lx9_papilio.bit) + +4. Compile and install binutils. Take the latest version from GNU. mkdir build && cd build ../configure --target=lm32-elf make make install -2. Compile and install GCC 4.5. Take gcc-core and gcc-g++ from GNU. +5. Compile and install GCC 4.5. Take gcc-core and gcc-g++ from GNU. rm -rf libstdc++-v3 mkdir build && cd build ../configure --target=lm32-elf --enable-languages="c,c++" --disable-libgcc --disable-libssp make make install -3. Obtain compiler-rt and set the CRTDIR environment variable to the root of - its source tree. +6. Obtain compiler-rt and set the CRTDIR environment variable to the root of + its source tree. svn co http://llvm.org/svn/llvm-project/compiler-rt/trunk compiler-rt export CRTDIR=/path_to/compiler-rt -4. Build and flash the BIOS (part of this source distribution). - cd software/bios - make - make flash - -The second command requires m1nor-ng, FJMEM and UrJTAG. -These tools can be found at: - https://github.com/m-labs/fjmem-m1 - http://urjtag.org - -[> Instructions (gateware) --------------------------- -First, download and install Migen from: - https://github.com/m-labs/migen - -Once this is done, build the bitstream with: - ./make.py [-p ] -l -This will generate the build/soc-.bit programming file -and load it with UrJTAG. +7. Build and flash the BIOS and bitstream. Run from MiSoC: + For Mixxeo: ./make.py all + For M1: ./make.py -p m1 -s FramebufferSoC all + For Papilio Pro: ./make.py -t simple all -A new BIOS needs to be built and flashed for MiSoC. -There is no compatibility with Milkymist SoC. +8. Run a terminal program on the board's serial port at 115200 8-N-1. + You should get the BIOS prompt. -Enjoy! - -[> Misc -------- -Code repository: - https://github.com/m-labs/misoc +9. Read and experiment with the source! Come to our IRC channel and mailing list! +[> License +---------- MiSoC is released under the very permissive two-clause BSD license. Under the terms of this license, you are authorized to use MiSoC for closed-source proprietary designs. @@ -70,5 +85,14 @@ do them if possible: complex and/or you are not sure how to proceed, feel free to discuss it on the mailing list or IRC (#m-labs on Freenode) beforehand. -See LICENSE file for full copyright and license info. You can contact us on the -public mailing list devel [AT] lists.m-labs.hk. +See LICENSE file for full copyright and license info. + +[> Links +-------- +Web: + http://m-labs.hk + +Code repository: + https://github.com/m-labs/misoc + +You can contact us on the public mailing list devel [AT] lists.m-labs.hk.