From: Adrian Straetling Date: Mon, 9 May 2005 17:32:20 +0000 (+0000) Subject: s390.md: ("gf") New mode attribute. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f8f843440b5d89e6087e41b37bda69f44e8a758;p=gcc.git s390.md: ("gf") New mode attribute. 2005-05-09 Adrian Straetling * config/s390/s390.md: ("gf") New mode attribute. ("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2", "fixuns_truncsfsi2"): Merge. ("fix_truncdfdi2", "fix_truncsfdi2"): Merge. ("fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", "fix_truncsfdi2_ieee", "fix_truncsfsi2_ieee"): Merge. From-SVN: r99458 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c3ad2e8901e..f0a8c6b4e3b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2005-05-09 Adrian Straetling + + * config/s390/s390.md: ("gf") New mode attribute. + ("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2", + "fixuns_truncsfsi2"): Merge. + ("fix_truncdfdi2", "fix_truncsfdi2"): Merge. + ("fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", "fix_truncsfdi2_ieee", + "fix_truncsfsi2_ieee"): Merge. + 2005-05-09 Adrian Straetling * config/s390/s390.md: ("FPR") New mode macro. diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 0c752f5e02c..0d876421003 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -292,6 +292,10 @@ ;; and "lcr" in SImode. (define_mode_attr g [(DI "g") (SI "")]) +;; In GPR templates, a string like "cdbr" will expand to "cgdbr" in DImode +;; and "cfdbr" in SImode. +(define_mode_attr gf [(DI "g") (SI "f")]) + ;; ICM mask required to load MODE value into the highest subreg ;; of a SImode register. (define_mode_attr icm_hi [(HI "12") (QI "8")]) @@ -2667,85 +2671,64 @@ ; -; fixuns_truncdfdi2 and fix_truncdfsi2 instruction pattern(s). +; fixuns_trunc(sf|df)(si|di)2 and fix_trunc(sf|df)(si|di)2 instruction pattern(s). ; -(define_expand "fixuns_truncdfdi2" - [(set (match_operand:DI 0 "register_operand" "") - (unsigned_fix:DI (match_operand:DF 1 "register_operand" "")))] - "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" +(define_expand "fixuns_trunc2" + [(set (match_operand:GPR 0 "register_operand" "") + (unsigned_fix:GPR (match_operand:FPR 1 "register_operand" "")))] + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); - rtx temp = gen_reg_rtx (DFmode); - operands[1] = force_reg (DFmode, operands[1]); - - emit_insn (gen_cmpdf (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("9223372036854775808.0", DFmode), DFmode))); + rtx temp = gen_reg_rtx (mode); + REAL_VALUE_TYPE cmp, sub; + + operands[1] = force_reg (mode, operands[1]); + real_2expN (&cmp, GET_MODE_BITSIZE(mode) - 1); + real_2expN (&sub, GET_MODE_BITSIZE(mode)); + + emit_insn (gen_cmp (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE (cmp, mode))); emit_jump_insn (gen_blt (label1)); - emit_insn (gen_subdf3 (temp, operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("18446744073709551616.0", DFmode), DFmode))); - emit_insn (gen_fix_truncdfdi2_ieee (operands[0], temp, GEN_INT(7))); + emit_insn (gen_sub3 (temp, operands[1], + CONST_DOUBLE_FROM_REAL_VALUE (sub, mode))); + emit_insn (gen_fix_trunc2_ieee (operands[0], temp, + GEN_INT(7))); emit_jump (label2); emit_label (label1); - emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5))); + emit_insn (gen_fix_trunc2_ieee (operands[0], + operands[1], GEN_INT(5))); emit_label (label2); DONE; }) -(define_expand "fix_truncdfdi2" +(define_expand "fix_truncdi2" [(set (match_operand:DI 0 "register_operand" "") - (fix:DI (match_operand:DF 1 "nonimmediate_operand" "")))] + (fix:DI (match_operand:FPR 1 "nonimmediate_operand" "")))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" { - operands[1] = force_reg (DFmode, operands[1]); - emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5))); + operands[1] = force_reg (mode, operands[1]); + emit_insn (gen_fix_truncdi2_ieee (operands[0], operands[1], + GEN_INT(5))); DONE; }) -(define_insn "fix_truncdfdi2_ieee" - [(set (match_operand:DI 0 "register_operand" "=d") - (fix:DI (match_operand:DF 1 "register_operand" "f"))) - (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND) +(define_insn "fix_trunc2_ieee" + [(set (match_operand:GPR 0 "register_operand" "=d") + (fix:GPR (match_operand:FPR 1 "register_operand" "f"))) + (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC 33))] - "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - "cgdbr\t%0,%h2,%1" + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" + "cbr\t%0,%h2,%1" [(set_attr "op_type" "RRE") (set_attr "type" "ftoi")]) ; -; fixuns_truncdfsi2 and fix_truncdfsi2 instruction pattern(s). +; fix_truncdfsi2 instruction pattern(s). ; -(define_expand "fixuns_truncdfsi2" - [(set (match_operand:SI 0 "register_operand" "") - (unsigned_fix:SI (match_operand:DF 1 "register_operand" "")))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" -{ - rtx label1 = gen_label_rtx (); - rtx label2 = gen_label_rtx (); - rtx temp = gen_reg_rtx (DFmode); - - operands[1] = force_reg (DFmode,operands[1]); - emit_insn (gen_cmpdf (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("2147483648.0", DFmode), DFmode))); - emit_jump_insn (gen_blt (label1)); - emit_insn (gen_subdf3 (temp, operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("4294967296.0", DFmode), DFmode))); - emit_insn (gen_fix_truncdfsi2_ieee (operands[0], temp, GEN_INT (7))); - emit_jump (label2); - - emit_label (label1); - emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5))); - emit_label (label2); - DONE; -}) - (define_expand "fix_truncdfsi2" [(set (match_operand:SI 0 "register_operand" "") (fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))] @@ -2772,16 +2755,6 @@ DONE; }) -(define_insn "fix_truncdfsi2_ieee" - [(set (match_operand:SI 0 "register_operand" "=d") - (fix:SI (match_operand:DF 1 "register_operand" "f"))) - (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND) - (clobber (reg:CC 33))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - "cfdbr\t%0,%h2,%1" - [(set_attr "op_type" "RRE") - (set_attr "type" "ftoi")]) - (define_insn "fix_truncdfsi2_ibm" [(set (match_operand:SI 0 "register_operand" "=d") (fix:SI (match_operand:DF 1 "nonimmediate_operand" "+f"))) @@ -2800,86 +2773,9 @@ [(set_attr "length" "20")]) ; -; fixuns_truncsfdi2 and fix_truncsfdi2 instruction pattern(s). +; fix_truncsfsi2 instruction pattern(s). ; -(define_expand "fixuns_truncsfdi2" - [(set (match_operand:DI 0 "register_operand" "") - (unsigned_fix:DI (match_operand:SF 1 "register_operand" "")))] - "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" -{ - rtx label1 = gen_label_rtx (); - rtx label2 = gen_label_rtx (); - rtx temp = gen_reg_rtx (SFmode); - - operands[1] = force_reg (SFmode, operands[1]); - emit_insn (gen_cmpsf (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("9223372036854775808.0", SFmode), SFmode))); - emit_jump_insn (gen_blt (label1)); - - emit_insn (gen_subsf3 (temp, operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("18446744073709551616.0", SFmode), SFmode))); - emit_insn (gen_fix_truncsfdi2_ieee (operands[0], temp, GEN_INT(7))); - emit_jump (label2); - - emit_label (label1); - emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5))); - emit_label (label2); - DONE; -}) - -(define_expand "fix_truncsfdi2" - [(set (match_operand:DI 0 "register_operand" "") - (fix:DI (match_operand:SF 1 "nonimmediate_operand" "")))] - "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" -{ - operands[1] = force_reg (SFmode, operands[1]); - emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5))); - DONE; -}) - -(define_insn "fix_truncsfdi2_ieee" - [(set (match_operand:DI 0 "register_operand" "=d") - (fix:DI (match_operand:SF 1 "register_operand" "f"))) - (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND) - (clobber (reg:CC 33))] - "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - "cgebr\t%0,%h2,%1" - [(set_attr "op_type" "RRE") - (set_attr "type" "ftoi")]) - -; -; fixuns_truncsfsi2 and fix_truncsfsi2 instruction pattern(s). -; - -(define_expand "fixuns_truncsfsi2" - [(set (match_operand:SI 0 "register_operand" "") - (unsigned_fix:SI (match_operand:SF 1 "register_operand" "")))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" -{ - rtx label1 = gen_label_rtx (); - rtx label2 = gen_label_rtx (); - rtx temp = gen_reg_rtx (SFmode); - - operands[1] = force_reg (SFmode, operands[1]); - emit_insn (gen_cmpsf (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("2147483648.0", SFmode), SFmode))); - emit_jump_insn (gen_blt (label1)); - emit_insn (gen_subsf3 (temp, operands[1], - CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF ("4294967296.0", SFmode), SFmode))); - emit_insn (gen_fix_truncsfsi2_ieee (operands[0], temp, GEN_INT (7))); - emit_jump (label2); - - emit_label (label1); - emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5))); - emit_label (label2); - DONE; -}) - (define_expand "fix_truncsfsi2" [(set (match_operand:SI 0 "register_operand" "") (fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))] @@ -2901,16 +2797,6 @@ DONE; }) -(define_insn "fix_truncsfsi2_ieee" - [(set (match_operand:SI 0 "register_operand" "=d") - (fix:SI (match_operand:SF 1 "register_operand" "f"))) - (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND) - (clobber (reg:CC 33))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - "cfebr\t%0,%h2,%1" - [(set_attr "op_type" "RRE") - (set_attr "type" "ftoi")]) - ; ; floatdi(df|sf)2 instruction pattern(s). ;