From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 24 Mar 2022 07:19:34 +0000 (+0000)
Subject: add instruction format to setvl
X-Git-Tag: opf_rfc_ls005_v1~2987
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f928672a8e387808745df3e1787ddc70152dd42;p=libreriscv.git

add instruction format to setvl
---

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 6bd770b5f..8a9077127 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -81,6 +81,11 @@ Form: SVL-Form (see [[isatables/fields.text]])
 | -- | -- | --- | ---- |----------- | ----- |--| ------- |
 |OPCD| RT | RA  | SVi  |cv ms vs vf | 11110 |Rc| setvl   |
 
+Instruction format:
+
+    setvl RT,RA,SVi,vf,vs,ms
+    setvl. RT,RA,SVi,vf,vs,ms
+
 Note that the immediate (`SVi`) spans 7 bits (16 to 22)
 
 * `cv` - bit 22 - reads CTR instead of RA