From: lkcl <lkcl@web>
Date: Tue, 10 May 2022 16:10:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2273
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2f9a4ac511e4600310982a975ddd979fd0808a5a;p=libreriscv.git

---

diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
index 0a6b41971..eabac69f4 100644
--- a/docs/pinmux.mdwn
+++ b/docs/pinmux.mdwn
@@ -7,6 +7,7 @@ Links:
 * <https://ftp.libre-soc.org/Pin_Control_Subsystem_Overview.pdf>
 * <https://bugs.libre-soc.org/show_bug.cgi?id=50>
 * <https://bugs.libre-soc.org/show_bug.cgi?id=750>
+* <https://bugs.libre-soc.org/show_bug.cgi?id=762>
 * <https://git.libre-soc.org/?p=c4m-jtag.git;a=tree;hb=HEAD>
 * Extra info: [[/docs/pinmux/temp_pinmux_info]]
 
@@ -500,6 +501,31 @@ The 32-bit on the other hand has four address rows, and so will take four write
 * 0x02 - Configure GPIOs  8-11 - requires 4-bit `sel` one bit per GPIO
 * 0x03 - Configure GPIOs 12-15 - requires 4-bit `sel` one bit per GPIO
 
+Here is the pseudocode for reading the GPIO
+data structs:
+
+    read_bytes = []
+    for i in range(len(sel)):
+        GPIO_num = adr*len(sel)+i
+        if sel[i]:
+            read_bytes.append(GPIO[GPIO_num])
+        else:
+            read_bytes.append(Const(0, 8))
+    if not wen:
+        dat_r.eq(Cat(read_bytes))
+
+and for writing, slightly different style:
+
+    if wen:
+        write_bytes = []
+        for i in range(len(sel)):
+            GPIO_num = adr*len(sel)+i
+            write_byte = dat_w.bit_select(i*8, 8)
+            if sel[i]:
+                GPIO[GPIO_num].eq(write_byte)
+
+As explained in this video
+
 ## Combining JTAG BS Chain and Pinmux (In Progress)
 [[!img io_mux_bank_planning.JPG size="600x"]]