From: Luke Kenneth Casson Leighton Date: Wed, 25 Jul 2018 04:35:11 +0000 (+0100) Subject: start adding fast/external bus spec X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2fc42a52976eccb0bf7b4182293bfd5262326402;p=pinmux.git start adding fast/external bus spec --- diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py index a595dbe..6de3932 100644 --- a/src/bsv/peripheral_gen/base.py +++ b/src/bsv/peripheral_gen/base.py @@ -8,9 +8,6 @@ class PBase(object): def slowifdeclmux(self, name, count): return '' - def slowifinstance(self, name, count): - return '' - def slowimport(self): return '' @@ -179,6 +176,13 @@ class PBase(object): def mk_ext_ifacedef(self, iname, inum): return '' + def extifinstance(self, name, count): + sname = self.peripheral.iname().format(count) + pname = self.get_iname(count) + template = " interface {0} = pinmux.peripheral_side.{1};" + return template.format(pname, sname) + + mkplic_rule = """\ rule rl_connect_{0}_to_plic_{2}; @@ -230,7 +234,7 @@ class PeripheralIface(object): self.slow = slow(ifacename) self.slow.peripheral = self for fname in ['slowimport', - 'slowifinstance', 'slowifdecl', 'slowifdeclmux', + 'extifinstance', 'slowifdecl', 'slowifdeclmux', 'mkslow_peripheral', 'mk_plic', 'mk_ext_ifacedef', 'mk_connection', 'mk_cellconn', 'mk_pincon']: fn = CallFn(self, fname) @@ -271,11 +275,11 @@ class PeripheralInterfaces(object): ret.append(self.data[name].slowimport()) return '\n'.join(list(filter(None, ret))) - def slowifinstance(self, *args): + def extifinstance(self, *args): ret = [] for (name, count) in self.ifacecount: for i in range(count): - ret.append(self.data[name].slowifinstance(name, i)) + ret.append(self.data[name].extifinstance(name, i)) return '\n'.join(list(filter(None, ret))) def slowifdeclmux(self, *args): diff --git a/src/bsv/peripheral_gen/jtag.py b/src/bsv/peripheral_gen/jtag.py index e86880d..589ecf8 100644 --- a/src/bsv/peripheral_gen/jtag.py +++ b/src/bsv/peripheral_gen/jtag.py @@ -14,11 +14,5 @@ class jtag(PBase): def slowifdeclmux(self, name, count): sname = self.get_iname(count) - return " interface PeripheralSideJTAG %s_out;" % sname - - def slowifinstance(self, name, count): - sname = self.peripheral.iname().format(count) - pname = self.get_iname(count) - template = " interface {0}_out = pinmux.peripheral_side.{1};" - return template.format(pname, sname) + return " interface PeripheralSideJTAG %s;" % sname diff --git a/src/bsv/peripheral_gen/rgbttl.py b/src/bsv/peripheral_gen/rgbttl.py index fa7e49a..3d3f6b5 100644 --- a/src/bsv/peripheral_gen/rgbttl.py +++ b/src/bsv/peripheral_gen/rgbttl.py @@ -36,11 +36,5 @@ class rgbttl(PBase): def slowifdeclmux(self, name, count): sname = self.get_iname(count) - return " interface PeripheralSideLCD %s_out;" % sname - - def slowifinstance(self, name, count): - sname = self.peripheral.iname().format(count) - pname = self.get_iname(count) - template = " interface {0}_out = pinmux.peripheral_side.{1};" - return template.format(pname, sname) + return " interface PeripheralSideLCD %s;" % sname diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index bf4bfa6..2abce7c 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -110,7 +110,7 @@ def write_slow(slow, slowt, p, ifaces, iocells): mkcon = ifaces.mk_connection() mkcellcon = ifaces.mk_cellconn() pincon = ifaces.mk_pincon() - inst = ifaces.slowifinstance() + inst = ifaces.extifinstance() mkplic = ifaces.mk_plic() numsloirqs = ifaces.mk_sloirqsdef() ifacedef = ifaces.mk_ext_ifacedef() diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index b8afe99..2f04f34 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -90,7 +90,8 @@ if __name__ == '__main__': if testing: dummytest(ps, output_dir, output_type) else: - specgen(of, output_dir, pinout, bankspec, pinspec, fixedpins) + specgen(of, output_dir, pinout, + bankspec, pinspec, fixedpins, ps.fastbus) else: if output_type == 'bsv': from bsv.pinmux_generator import pinmuxgen as gentypes diff --git a/src/spec/base.py b/src/spec/base.py index af2d2ab..b41cc37 100644 --- a/src/spec/base.py +++ b/src/spec/base.py @@ -5,7 +5,8 @@ from spec.ifaceprint import display_fixed class PinSpec(Pinouts): - def __init__(self, pinbanks, fixedpins, function_names): + def __init__(self, pinbanks, fixedpins, function_names, fast=None): + self.fastbus = fast or [] self.pinbanks = pinbanks self.fixedpins = fixedpins self.function_names = function_names diff --git a/src/spec/gen.py b/src/spec/gen.py index 2c1335f..1ce10e3 100644 --- a/src/spec/gen.py +++ b/src/spec/gen.py @@ -3,7 +3,7 @@ import os.path from spec.interfaces import Pinouts -def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins): +def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins, fastbus): """ generates a specification of pinouts (tsv files) for reading in by pinmux. @@ -31,7 +31,12 @@ def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins): with open(os.path.join(pth, 'interfaces.txt'), 'w') as f: for k in pinouts.fnspec.keys(): s = pinouts.fnspec[k] - f.write("%s\t%d\n" % (k.lower(), len(s))) + line = [k.lower(), str(len(s))] + for b in fastbus: + if b.startswith(k.lower()): + line.append(b) + line = '\t'.join(line) + f.write("%s\n" % line) s0 = s[list(s.keys())[0]] # hack, take first gangedgroup = pinouts.ganged[k] with open(os.path.join(pth, '%s.txt' % k.lower()), 'w') as g: diff --git a/src/spec/i_class.py b/src/spec/i_class.py index 8a45611..daf064a 100644 --- a/src/spec/i_class.py +++ b/src/spec/i_class.py @@ -57,7 +57,8 @@ def pinspec(): 'ULPI2': 'ULPI (USB Low Pin-count) 2', } - ps = PinSpec(pinbanks, fixedpins, function_names) + ps = PinSpec(pinbanks, fixedpins, function_names, + ['lcd0', 'jtag0']) # Bank A, 0-27 ps.gpio("", ('A', 0), 0, 0, 28)