From: Thomas Preud'homme Date: Thu, 24 Dec 2015 09:33:17 +0000 (+0800) Subject: Add support for linking ARMv8-M object files X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=2fd158eb7bd4059478086143dd58edcc5ea44864;p=binutils-gdb.git Add support for linking ARMv8-M object files 2015-12-24 Thomas Preud'homme bfd/ * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update logic around Tag_CPU_arch values to return TRUE for ARMv8-M architectures. (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for ARMv8-M. bfd/testsuite/ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", "EABI attribute merging 9" and "EABI attribute merging 10". (Thumb-Thumb farcall v8-M): Renamed to ... (Thumb-Thumb farcall v8-M Mainline): This. (Thumb-Thumb farcall v8-M Baseline): New test. * ld-arm/attr-merge-8a.s: New file. * ld-arm/attr-merge-8b.s: Likewise. * ld-arm/attr-merge-8.attr: Likewise. * ld-arm/attr-merge-9a.s: Likewise. * ld-arm/attr-merge-9b.s: Likewise. * ld-arm/attr-merge-9.out: Likewise. * ld-arm/attr-merge-10a.s: Likewise. * ld-arm/attr-merge-10b.s: Likewise. * ld-arm/attr-merge-10.attr: Likewise. --- diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 65e9bfb779a..a3f3a6c08cb 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,13 @@ +2015-12-24 Thomas Preud'homme + + * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update + logic around Tag_CPU_arch values to return TRUE for ARMv8-M + architectures. + (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update + v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. + (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for + ARMv8-M. + 2015-12-24 Thomas Preud'homme (tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index 415090f293c..f350dd91019 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -3504,20 +3504,23 @@ create_ifunc_sections (struct bfd_link_info *info) static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals) { - int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, - Tag_CPU_arch); - int profile; + int arch; + int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, + Tag_CPU_arch_profile); - if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M) - return TRUE; + if (profile) + return profile == 'M'; - if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M) - return FALSE; + arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); - profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, - Tag_CPU_arch_profile); + if (arch == TAG_CPU_ARCH_V6_M + || arch == TAG_CPU_ARCH_V6S_M + || arch == TAG_CPU_ARCH_V7E_M + || arch == TAG_CPU_ARCH_V8M_BASE + || arch == TAG_CPU_ARCH_V8M_MAIN) + return TRUE; - return profile == 'M'; + return FALSE; } /* Determine if we're dealing with a Thumb-2 object. */ @@ -12275,6 +12278,47 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, T(V8), /* V7E_M. */ T(V8) /* V8. */ }; + const int v8m_baseline[] = + { + -1, /* PRE_V4. */ + -1, /* V4. */ + -1, /* V4T. */ + -1, /* V5T. */ + -1, /* V5TE. */ + -1, /* V5TEJ. */ + -1, /* V6. */ + -1, /* V6KZ. */ + -1, /* V6T2. */ + -1, /* V6K. */ + -1, /* V7. */ + T(V8M_BASE), /* V6_M. */ + T(V8M_BASE), /* V6S_M. */ + -1, /* V7E_M. */ + -1, /* V8. */ + -1, + T(V8M_BASE) /* V8-M BASELINE. */ + }; + const int v8m_mainline[] = + { + -1, /* PRE_V4. */ + -1, /* V4. */ + -1, /* V4T. */ + -1, /* V5T. */ + -1, /* V5TE. */ + -1, /* V5TEJ. */ + -1, /* V6. */ + -1, /* V6KZ. */ + -1, /* V6T2. */ + -1, /* V6K. */ + T(V8M_MAIN), /* V7. */ + T(V8M_MAIN), /* V6_M. */ + T(V8M_MAIN), /* V6S_M. */ + T(V8M_MAIN), /* V7E_M. */ + -1, /* V8. */ + -1, + T(V8M_MAIN), /* V8-M BASELINE. */ + T(V8M_MAIN) /* V8-M MAINLINE. */ + }; const int v4t_plus_v6_m[] = { -1, /* PRE_V4. */ @@ -12293,8 +12337,8 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, T(V7E_M), /* V7E_M. */ T(V8), /* V8. */ -1, /* Unused. */ - -1, /* V8-M BASELINE. */ - -1, /* V8-M MAINLINE. */ + T(V8M_BASE), /* V8-M BASELINE. */ + T(V8M_MAIN), /* V8-M MAINLINE. */ T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ }; const int *comb[] = @@ -12307,8 +12351,8 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, v7e_m, v8, NULL, - NULL, - NULL, + v8m_baseline, + v8m_mainline, /* Pseudo-architecture. */ v4t_plus_v6_m }; @@ -12524,7 +12568,10 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) "ARM v7", "ARM v6-M", "ARM v6S-M", - "ARM v8" + "ARM v8", + "", + "ARM v8-M.baseline", + "ARM v8-M.mainline", }; /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index d8b2d3ce746..879aab423bb 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2015-12-24 Thomas Preud'homme + + * ld-arm/arm-elf.exp (armeabitests_common): Run new tests + "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", + "EABI attribute merging 9" and "EABI attribute merging 10". + (Thumb-Thumb farcall v8-M): Renamed to ... + (Thumb-Thumb farcall v8-M Mainline): This. + (Thumb-Thumb farcall v8-M Baseline): New test. + * ld-arm/attr-merge-8a.s: New file. + * ld-arm/attr-merge-8b.s: Likewise. + * ld-arm/attr-merge-8.attr: Likewise. + * ld-arm/attr-merge-9a.s: Likewise. + * ld-arm/attr-merge-9b.s: Likewise. + * ld-arm/attr-merge-9.out: Likewise. + * ld-arm/attr-merge-10a.s: Likewise. + * ld-arm/attr-merge-10b.s: Likewise. + * ld-arm/attr-merge-10.attr: Likewise. + 2015-12-21 Yury Usishchev * ld-arm/arm-elf.exp: New test. diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index ac2abf173e0..724e3381512 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -388,6 +388,15 @@ set armeabitests_common { {"EABI attribute merging 7" "-r" "" "" {attr-merge-7a.s attr-merge-7b.s} {{readelf -A attr-merge-7.attr}} "attr-merge-7"} + {"EABI attribute merging 8" "-r" "" "" {attr-merge-8a.s attr-merge-8b.s} + {{readelf -A attr-merge-8.attr}} + "attr-merge-8"} + {"EABI attribute merging 9" "-r" "" "" {attr-merge-9a.s attr-merge-9b.s} + {{ld attr-merge-9.out}} + "attr-merge-9"} + {"EABI attribute merging 10" "-r" "" "" {attr-merge-10a.s attr-merge-10b.s} + {{readelf -A attr-merge-10.attr}} + "attr-merge-10"} {"EABI attribute arch merging 1" "-r" "" "" {arch-v6k.s arch-v6t2.s} {{readelf -A attr-merge-arch-1.attr}} "attr-merge-arch-1"} @@ -451,6 +460,12 @@ set armeabitests_nonacl { {"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv7-m" {farcall-thumb-thumb.s} {{objdump -d farcall-thumb-thumb-m.d}} "farcall-thumb-thumb-m"} + {"Thumb-Thumb farcall v8-M Baseline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.base" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-m.d}} + "farcall-thumb-thumb-v8-m-base"} + {"Thumb-Thumb farcall v8-M Mainline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.main" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-m.d}} + "farcall-thumb-thumb-v8-m-main"} {"Thumb-Thumb farcall v6-M" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv6-m" {farcall-thumb-thumb.s} {{objdump -d farcall-thumb-thumb-m.d}} "farcall-thumb-thumb-v6-m"} diff --git a/ld/testsuite/ld-arm/attr-merge-10.attr b/ld/testsuite/ld-arm/attr-merge-10.attr new file mode 100644 index 00000000000..3d4e82cdfd1 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-10.attr @@ -0,0 +1,6 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8-M.MAIN" + Tag_CPU_arch: v8-M.mainline + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Yes diff --git a/ld/testsuite/ld-arm/attr-merge-10a.s b/ld/testsuite/ld-arm/attr-merge-10a.s new file mode 100644 index 00000000000..faff6bdd379 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-10a.s @@ -0,0 +1,5 @@ + .arch armv8-m.base + + @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.BASE + .eabi_attribute Tag_CPU_arch, 16 + .eabi_attribute Tag_CPU_arch_profile, 'M' diff --git a/ld/testsuite/ld-arm/attr-merge-10b.s b/ld/testsuite/ld-arm/attr-merge-10b.s new file mode 100644 index 00000000000..68625d3d7f0 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-10b.s @@ -0,0 +1,5 @@ + .arch armv8-m.main + + @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.MAIN + .eabi_attribute Tag_CPU_arch, 17 + .eabi_attribute Tag_CPU_arch_profile, 'M' diff --git a/ld/testsuite/ld-arm/attr-merge-8.attr b/ld/testsuite/ld-arm/attr-merge-8.attr new file mode 100644 index 00000000000..7f922ac6cff --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-8.attr @@ -0,0 +1,6 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8-M.BASE" + Tag_CPU_arch: v8-M.baseline + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Yes diff --git a/ld/testsuite/ld-arm/attr-merge-8a.s b/ld/testsuite/ld-arm/attr-merge-8a.s new file mode 100644 index 00000000000..fc5ea8b3922 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-8a.s @@ -0,0 +1,5 @@ + .arch armv6-m + + @ Tag_CPU_arch & Tag_CPU_arch_profile = v6-M + .eabi_attribute Tag_CPU_arch, 11 + .eabi_attribute Tag_CPU_arch_profile, 'M' diff --git a/ld/testsuite/ld-arm/attr-merge-8b.s b/ld/testsuite/ld-arm/attr-merge-8b.s new file mode 100644 index 00000000000..8ee553a988d --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-8b.s @@ -0,0 +1,5 @@ + .arch armv8-m.base + + @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M Baseline + .eabi_attribute Tag_CPU_arch, 16 + .eabi_attribute Tag_CPU_arch_profile, 'M' diff --git a/ld/testsuite/ld-arm/attr-merge-9.out b/ld/testsuite/ld-arm/attr-merge-9.out new file mode 100644 index 00000000000..bb09181f6c0 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-9.out @@ -0,0 +1,2 @@ +.*: error: .*: Conflicting CPU architectures 10/16 +.*: failed to merge target specific data of file tmpdir/attr-merge-9b.o diff --git a/ld/testsuite/ld-arm/attr-merge-9a.s b/ld/testsuite/ld-arm/attr-merge-9a.s new file mode 100644 index 00000000000..0e24017d118 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-9a.s @@ -0,0 +1,5 @@ + .arch armv7-m + + @ Tag_CPU_arch & Tag_CPU_arch_profile = v7-M + .eabi_attribute Tag_CPU_arch, 10 + .eabi_attribute Tag_CPU_arch_profile, 'M' diff --git a/ld/testsuite/ld-arm/attr-merge-9b.s b/ld/testsuite/ld-arm/attr-merge-9b.s new file mode 100644 index 00000000000..8ee553a988d --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge-9b.s @@ -0,0 +1,5 @@ + .arch armv8-m.base + + @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M Baseline + .eabi_attribute Tag_CPU_arch, 16 + .eabi_attribute Tag_CPU_arch_profile, 'M'