From: lkcl <lkcl@web>
Date: Fri, 8 May 2020 11:15:38 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2701
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=30a9c4e2018ee85e215f7735f61a7be5bd0cf9ad;p=libreriscv.git

---

diff --git a/180nm_Oct2020/interfaces.mdwn b/180nm_Oct2020/interfaces.mdwn
index 8a3c09dc9..ce72e9628 100644
--- a/180nm_Oct2020/interfaces.mdwn
+++ b/180nm_Oct2020/interfaces.mdwn
@@ -1,5 +1,7 @@
 # Interfaces for the 180nm Oct2020 ASIC
 
+Bugreport and discussion at <https://bugs.libre-soc.org/show_bug.cgi?id=304>
+
 These are bare minimum viability:
 
 * [[shakti/m_class/UART]]
@@ -10,3 +12,6 @@ These are bare minimum viability:
 * [[shakti/m_class/LPC]]
 * [[shakti/m_class/EINT]]
 
+# Secondary priorities
+
+TODO