From: Chris Demetriou Date: Tue, 30 Sep 2003 21:02:08 +0000 (+0000) Subject: [ gas/ChangeLog ] X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=30c378fd6068045a2857a3cc78baad58aa787892;p=binutils-gdb.git [ gas/ChangeLog ] 2003-09-30 Chris Demetriou * config/tc-mips.c (mips_ip): Capitalize first word of existing condition code warning, and add condition code warnings for .ps instructions, and for bc1any[24][tf]. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou * lib/gas-defs.exp (run_dump_test): If stderr file is specified and there was no stderr output, compare anyway (i.e., cause a test failure). * gas/mips/mips64-mips3d.s: Add some new instructions to test warnings. * gas/mips/mips64-mips3d.l: New file. * gas/mips/mips64-mips3d.d: Use mips64-mips3d.l, and update for changes to mips64-mips3d.s. * gas/mips/mips64-mips3d-incl.d: Likewise. * gas/mips/set-arch.l: New file. * gas/mips/set-arch.d: Specify set-arch.l as stderr output to check. * gas/mips/mips5.l: Make error messages match source. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 2369a76cde6..3c05999e061 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2003-09-30 Chris Demetriou + + * config/tc-mips.c (mips_ip): Capitalize first word of + existing condition code warning, and add condition code + warnings for .ps instructions, and for bc1any[24][tf]. + 2003-09-30 Chris Demetriou * NEWS: Mention support for MIPS64 Release 2. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 25e5a3df8df..a1f2d3829d3 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -9369,7 +9369,18 @@ do_msbd: } while (ISDIGIT (*s)); if (regno > 7) - as_bad (_("invalid condition code register $fcc%d"), regno); + as_bad (_("Invalid condition code register $fcc%d"), regno); + if ((strcmp(str + strlen(str) - 3, ".ps") == 0 + || strcmp(str + strlen(str) - 5, "any2f") == 0 + || strcmp(str + strlen(str) - 5, "any2t") == 0) + && (regno & 1) != 0) + as_warn(_("Condition code register should be even for %s, was %d"), + str, regno); + if ((strcmp(str + strlen(str) - 5, "any4f") == 0 + || strcmp(str + strlen(str) - 5, "any4t") == 0) + && (regno & 3) != 0) + as_warn(_("Condition code register should be 0 or 4 for %s, was %d"), + str, regno); if (*args == 'N') ip->insn_opcode |= regno << OP_SH_BCC; else diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 0b9887d37ea..677a75d0316 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,17 @@ +2003-09-30 Chris Demetriou + + * lib/gas-defs.exp (run_dump_test): If stderr file is specified + and there was no stderr output, compare anyway (i.e., cause a + test failure). + * gas/mips/mips64-mips3d.s: Add some new instructions to test warnings. + * gas/mips/mips64-mips3d.l: New file. + * gas/mips/mips64-mips3d.d: Use mips64-mips3d.l, and update for + changes to mips64-mips3d.s. + * gas/mips/mips64-mips3d-incl.d: Likewise. + * gas/mips/set-arch.l: New file. + * gas/mips/set-arch.d: Specify set-arch.l as stderr output to check. + * gas/mips/mips5.l: Make error messages match source. + 2003-09-30 Chris Demetriou * gas/mips/cp0-names-mips64r2.d: New file. diff --git a/gas/testsuite/gas/mips/mips5.l b/gas/testsuite/gas/mips/mips5.l index 9cacb2ec57a..bb6ed49ddf6 100644 --- a/gas/testsuite/gas/mips/mips5.l +++ b/gas/testsuite/gas/mips/mips5.l @@ -1,3 +1,3 @@ .*: Assembler messages: -.*:61: Warning: Condition flag should be even for c.eq.ps, was 3 -.*:62: Warning: Condition flag should be even for movf.ps, was 3 +.*:61: Warning: Condition code register should be even for c.eq.ps, was 3 +.*:62: Warning: Condition code register should be even for movf.ps, was 3 diff --git a/gas/testsuite/gas/mips/mips64-mips3d-incl.d b/gas/testsuite/gas/mips/mips64-mips3d-incl.d index 5c14e280a68..5da2a81f24a 100644 --- a/gas/testsuite/gas/mips/mips64-mips3d-incl.d +++ b/gas/testsuite/gas/mips/mips64-mips3d-incl.d @@ -1,6 +1,7 @@ #objdump: -dr --prefix-addresses --show-raw-insn #name: MIPS MIPS64 MIPS-3D ASE instructions #source: mips64-mips3d.s +#stderr: mips64-mips3d.l # Check MIPS64 MIPS-3D ASE instruction assembly and disassembly # Same as mips64-mips3d.d, but does not need -mips3d assembler @@ -137,4 +138,12 @@ Disassembly of section .text: 0+01f4 <[^>]*> 4633411f rsqrt2\.d \$f4,\$f8,\$f19 0+01f8 <[^>]*> 4613411f rsqrt2\.s \$f4,\$f8,\$f19 0+01fc <[^>]*> 46d3411f rsqrt2\.ps \$f4,\$f8,\$f19 +0+0200 <[^>]*> 4524ff7f bc1any2f \$fcc1,0+0000 +0+0204 <[^>]*> 00000000 nop +0+0208 <[^>]*> 452dff7d bc1any2t \$fcc3,0+0000 +0+020c <[^>]*> 00000000 nop +0+0210 <[^>]*> 4544ff7b bc1any4f \$fcc1,0+0000 +0+0214 <[^>]*> 00000000 nop +0+0218 <[^>]*> 4549ff79 bc1any4t \$fcc2,0+0000 +0+021c <[^>]*> 00000000 nop \.\.\. diff --git a/gas/testsuite/gas/mips/mips64-mips3d.d b/gas/testsuite/gas/mips/mips64-mips3d.d index 3ea72d8c417..eb4b87f101b 100644 --- a/gas/testsuite/gas/mips/mips64-mips3d.d +++ b/gas/testsuite/gas/mips/mips64-mips3d.d @@ -1,6 +1,7 @@ #objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa64 #name: MIPS MIPS64 MIPS-3D ASE instructions (-mips3d flag) #as: -mips64 -mips3d +#stderr: mips64-mips3d.l # Check MIPS64 MIPS-3D ASE instruction assembly and disassembly @@ -135,4 +136,12 @@ Disassembly of section .text: 0+01f4 <[^>]*> 4633411f rsqrt2\.d \$f4,\$f8,\$f19 0+01f8 <[^>]*> 4613411f rsqrt2\.s \$f4,\$f8,\$f19 0+01fc <[^>]*> 46d3411f rsqrt2\.ps \$f4,\$f8,\$f19 +0+0200 <[^>]*> 4524ff7f bc1any2f \$fcc1,0+0000 +0+0204 <[^>]*> 00000000 nop +0+0208 <[^>]*> 452dff7d bc1any2t \$fcc3,0+0000 +0+020c <[^>]*> 00000000 nop +0+0210 <[^>]*> 4544ff7b bc1any4f \$fcc1,0+0000 +0+0214 <[^>]*> 00000000 nop +0+0218 <[^>]*> 4549ff79 bc1any4t \$fcc2,0+0000 +0+021c <[^>]*> 00000000 nop \.\.\. diff --git a/gas/testsuite/gas/mips/mips64-mips3d.l b/gas/testsuite/gas/mips/mips64-mips3d.l new file mode 100644 index 00000000000..22c80e9de06 --- /dev/null +++ b/gas/testsuite/gas/mips/mips64-mips3d.l @@ -0,0 +1,5 @@ +.*: Assembler messages: +.*:150: Warning: Condition code register should be even for bc1any2f, was 1 +.*:152: Warning: Condition code register should be even for bc1any2t, was 3 +.*:154: Warning: Condition code register should be 0 or 4 for bc1any4f, was 1 +.*:156: Warning: Condition code register should be 0 or 4 for bc1any4t, was 2 diff --git a/gas/testsuite/gas/mips/mips64-mips3d.s b/gas/testsuite/gas/mips/mips64-mips3d.s index 9c08dfbbbfe..2ba487827d7 100644 --- a/gas/testsuite/gas/mips/mips64-mips3d.s +++ b/gas/testsuite/gas/mips/mips64-mips3d.s @@ -147,5 +147,14 @@ text_label: rsqrt2.s $f4, $f8, $f19 rsqrt2.ps $f4, $f8, $f19 + bc1any2f $fcc1, text_label # warns + nop + bc1any2t $fcc3, text_label # warns + nop + bc1any4f $fcc1, text_label # warns + nop + bc1any4t $fcc2, text_label # warns + nop + # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... .space 8 diff --git a/gas/testsuite/gas/mips/set-arch.d b/gas/testsuite/gas/mips/set-arch.d index 40e6a8f442b..2e04b293ad6 100644 --- a/gas/testsuite/gas/mips/set-arch.d +++ b/gas/testsuite/gas/mips/set-arch.d @@ -1,5 +1,6 @@ #objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1 -M gpr-names=32 #name: .set arch=FOO +#stderr: set-arch.l dump\.o: file format .*mips diff --git a/gas/testsuite/gas/mips/set-arch.l b/gas/testsuite/gas/mips/set-arch.l new file mode 100644 index 00000000000..e6cd7239e80 --- /dev/null +++ b/gas/testsuite/gas/mips/set-arch.l @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*:146: Warning: Condition code register should be even for c.eq.ps, was 3 +.*:147: Warning: Condition code register should be even for movf.ps, was 3 diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp index c82bd8ab023..682987defe7 100644 --- a/gas/testsuite/lib/gas-defs.exp +++ b/gas/testsuite/lib/gas-defs.exp @@ -411,7 +411,7 @@ proc run_dump_test { name {extra_options {}} } { catch "exec $srcdir/lib/run $AS $ASFLAGS $opts(as) -o dump.o $sourcefile" comp_output set comp_output [prune_warnings $comp_output] - if ![string match "" $comp_output] then { + if { ![string match "" $comp_output] || $opts(stderr) != "" } then { if { $opts(stderr) == "" } then { send_log "$comp_output\n" verbose "$comp_output" 3