From: Matt Turner Date: Tue, 10 Feb 2015 05:26:14 +0000 (-0800) Subject: i965/blorp: Optimize clamping tex coords. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=30ec53f30ee5813db30777b45dbe456a02c8382e;p=mesa.git i965/blorp: Optimize clamping tex coords. Each emit_cond_mov() emits a CMP of its first to arguments using the specified conditional mod, followed by a predicated MOV of the fifth argument into the fourth. In all four cases here, it was just implementing MIN/MAX which we can do in a single SEL instruction. Also reorder the instructions for a slightly better schedule. Reviewed-by: Ian Romanick --- diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 10a53dc0ac4..fc111aef3b1 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -1308,10 +1308,10 @@ brw_blorp_blit_program::clamp_tex_coords(struct brw_reg regX, struct brw_reg clampX1, struct brw_reg clampY1) { - emit_cond_mov(regX, clampX0, BRW_CONDITIONAL_L, regX, clampX0); - emit_cond_mov(regX, clampX1, BRW_CONDITIONAL_G, regX, clampX1); - emit_cond_mov(regY, clampY0, BRW_CONDITIONAL_L, regY, clampY0); - emit_cond_mov(regY, clampY1, BRW_CONDITIONAL_G, regY, clampY1); + emit_max(regX, regX, clampX0); + emit_max(regY, regY, clampY0); + emit_min(regX, regX, clampX1); + emit_min(regY, regY, clampY1); } /** diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h index 8953ce83487..bfad4224a2c 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h @@ -85,6 +85,24 @@ protected: new (mem_ctx) fs_inst(BRW_OPCODE_LRP, 16, dst, src1, src2, src3)); } + inline void emit_min(const struct brw_reg& dst, + const struct brw_reg& src1, + const struct brw_reg& src2) + { + fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2); + inst->conditional_mod = BRW_CONDITIONAL_L; + insts.push_tail(inst); + } + + inline void emit_max(const struct brw_reg& dst, + const struct brw_reg& src1, + const struct brw_reg& src2) + { + fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2); + inst->conditional_mod = BRW_CONDITIONAL_GE; + insts.push_tail(inst); + } + inline void emit_mov(const struct brw_reg& dst, const struct brw_reg& src) { insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 16, dst, src));