From: Bill Schmidt Date: Thu, 30 May 2019 15:17:40 +0000 (+0000) Subject: rs6000-cpus.def (OTHER_FUSION_MASKS): New #define. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=30f78ec756bce65bca622a55916933860279632a;p=gcc.git rs6000-cpus.def (OTHER_FUSION_MASKS): New #define. 2019-05-30 Bill Schmidt Michael Meissner * rs6000-cpus.def (OTHER_FUSION_MASKS): New #define. (ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS. (ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE. (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR. (OTHER_FUTURE_MASKS): Likewise. (POWERPC_MASKS): Likewise. * rs6000.c (rs6000_option_override_internal): Error if -mpcrel is specified without -mprefixed-addr or -mcpu=future. Error if -mprefixed-addr is specified without -mcpu=future. (rs6000_opt_masks): Add entry for prefixed-addr. * rs6000.opt (mprefixed-addr): New option. Co-Authored-By: Michael Meissner From-SVN: r271781 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2f6c2a2ea2c..c912da60120 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2019-05-30 Bill Schmidt + Michael Meissner + + * rs6000-cpus.def (OTHER_FUSION_MASKS): New #define. + (ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS. + (ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE. + (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR. + (OTHER_FUTURE_MASKS): Likewise. + (POWERPC_MASKS): Likewise. + * rs6000.c (rs6000_option_override_internal): Error if -mpcrel is + specified without -mprefixed-addr or -mcpu=future. Error if + -mprefixed-addr is specified without -mcpu=future. + (rs6000_opt_masks): Add entry for prefixed-addr. + * rs6000.opt (mprefixed-addr): New option. + 2019-05-30 Sam Tebbs * aarch64/aarch64.c (aarch64_post_cfi_startproc): Add diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 5337382bdcf..101efd54183 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -56,29 +56,35 @@ | OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY_ATOMIC) +/* ISA masks setting fusion options. */ +#define OTHER_FUSION_MASKS (OPTION_MASK_P8_FUSION \ + | OPTION_MASK_P8_FUSION_SIGN) + /* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add FLOAT128_HW here until we are ready to make -mfloat128 on by default. */ -#define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ - | OPTION_MASK_ISEL \ - | OPTION_MASK_MODULO \ - | OPTION_MASK_P9_MINMAX \ - | OPTION_MASK_P9_MISC \ - | OPTION_MASK_P9_VECTOR) +#define ISA_3_0_MASKS_SERVER ((ISA_2_7_MASKS_SERVER \ + | OPTION_MASK_ISEL \ + | OPTION_MASK_MODULO \ + | OPTION_MASK_P9_MINMAX \ + | OPTION_MASK_P9_MISC \ + | OPTION_MASK_P9_VECTOR) \ + & ~OTHER_FUSION_MASKS) /* Support for the IEEE 128-bit floating point hardware requires a lot of the VSX instructions that are part of ISA 3.0. */ #define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \ | OPTION_MASK_P8_VECTOR \ - | OPTION_MASK_P9_VECTOR \ - | OPTION_MASK_DIRECT_MOVE) + | OPTION_MASK_P9_VECTOR) /* Support for a future processor's features. */ #define ISA_FUTURE_MASKS_SERVER (ISA_3_0_MASKS_SERVER \ | OPTION_MASK_FUTURE \ - | OPTION_MASK_PCREL) + | OPTION_MASK_PCREL \ + | OPTION_MASK_PREFIXED_ADDR) /* Flags that need to be turned off if -mno-future. */ -#define OTHER_FUTURE_MASKS (OPTION_MASK_PCREL) +#define OTHER_FUTURE_MASKS (OPTION_MASK_PCREL \ + | OPTION_MASK_PREFIXED_ADDR) /* Flags that need to be turned off if -mno-power9-vector. */ #define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \ @@ -139,6 +145,7 @@ | OPTION_MASK_POWERPC64 \ | OPTION_MASK_PPC_GFXOPT \ | OPTION_MASK_PPC_GPOPT \ + | OPTION_MASK_PREFIXED_ADDR \ | OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY_ATOMIC \ | OPTION_MASK_RECIP_PRECISION \ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index cfc2a6853c1..fca8bdfc04c 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -4296,15 +4296,24 @@ rs6000_option_override_internal (bool global_init_p) rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW; } - /* -mpcrel requires the prefixed load/store support on FUTURE systems. */ - if (!TARGET_FUTURE && TARGET_PCREL) + /* -mpcrel requires prefixed load/store addressing. */ + if (TARGET_PCREL && !TARGET_PREFIXED_ADDR) { if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0) - error ("%qs requires %qs", "-mpcrel", "-mcpu=future"); + error ("%qs requires %qs", "-mpcrel", "-mprefixed-addr"); rs6000_isa_flags &= ~OPTION_MASK_PCREL; } + /* -mprefixed-addr (and hence -mpcrel) requires -mcpu=future. */ + if (TARGET_PREFIXED_ADDR && !TARGET_FUTURE) + { + if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0) + error ("%qs requires %qs", "-mprefixed-addr", "-mcpu=future"); + + rs6000_isa_flags &= ~(OPTION_MASK_PCREL | OPTION_MASK_PREFIXED_ADDR); + } + /* Print the options after updating the defaults. */ if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags); @@ -36375,6 +36384,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = { "power9-vector", OPTION_MASK_P9_VECTOR, false, true }, { "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true }, { "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true }, + { "prefixed-addr", OPTION_MASK_PREFIXED_ADDR, false, true }, { "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true }, { "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true }, { "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true }, diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 43b04834746..3a4353674b8 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -574,6 +574,10 @@ mfuture Target Report Mask(FUTURE) Var(rs6000_isa_flags) Use instructions for a future architecture. +mprefixed-addr +Target Undocumented Mask(PREFIXED_ADDR) Var(rs6000_isa_flags) +Generate (do not generate) prefixed memory instructions. + mpcrel Target Report Mask(PCREL) Var(rs6000_isa_flags) Generate (do not generate) pc-relative memory addressing.