From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 27 Jun 2019 22:28:55 +0000 (-0700)
Subject: Remove redundant doc
X-Git-Tag: working-ls180~1237^2~13
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=312c03e4ca71f1560a9f47dcd2e9d3de1202179e;p=yosys.git

Remove redundant doc
---

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 7dbd98055..c24f66e52 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -62,9 +62,6 @@ struct SynthXilinxPass : public ScriptPass
 		log("        generate an output netlist (and BLIF file) suitable for VPR\n");
 		log("        (this feature is experimental and incomplete)\n");
 		log("\n");
-		log("    -nocarry\n");
-		log("        disable inference of carry chains\n");
-		log("\n");
 		log("    -nobram\n");
 		log("        disable inference of block rams\n");
 		log("\n");