From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 9 Aug 2019 17:13:49 +0000 (-0700)
Subject: Cleanup some more
X-Git-Tag: working-ls180~1149^2~9
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=313c9ec8df2aa0cbc077eb6d725e28336e9fe9e4;p=yosys.git

Cleanup some more
---

diff --git a/tests/opt/opt_expr.ys b/tests/opt/opt_expr.ys
index 9f3c0a1cd..28d57f530 100644
--- a/tests/opt/opt_expr.ys
+++ b/tests/opt/opt_expr.ys
@@ -5,8 +5,6 @@ module opt_expr_add_test(input [3:0] i, input [7:0] j, output [8:0] o);
 endmodule
 EOT
 
-hierarchy -auto-top
-
 equiv_opt -assert opt_expr -fine
 design -load postopt
 
@@ -22,8 +20,6 @@ module opt_expr_add_signed_test(input signed [3:0] i, input signed [7:0] j, outp
 endmodule
 EOT
 
-hierarchy -auto-top
-
 equiv_opt -assert opt_expr -fine
 design -load postopt
 
@@ -39,8 +35,6 @@ module opt_expr_sub_test1(input [3:0] i, input [7:0] j, output [8:0] o);
 endmodule
 EOT
 
-hierarchy -auto-top
-
 equiv_opt -assert opt_expr -fine
 design -load postopt
 
@@ -56,8 +50,6 @@ module opt_expr_sub_signed_test1(input signed [3:0] i, input signed [7:0] j, out
 endmodule
 EOT
 
-hierarchy -auto-top
-
 equiv_opt -assert opt_expr -fine
 design -load postopt
 
@@ -73,8 +65,6 @@ module opt_expr_sub_test2(input [3:0] i, input [7:0] j, output [8:0] o);
 endmodule
 EOT
 
-hierarchy -auto-top
-
 equiv_opt -assert opt_expr -fine
 design -load postopt
 
@@ -90,8 +80,6 @@ module opt_expr_sub_test4(input [3:0] i, output [8:0] o);
 endmodule
 EOT
 
-hierarchy -auto-top
-
 equiv_opt -assert opt_expr -fine
 design -load postopt