From: Michael Nolan Date: Fri, 15 May 2020 15:11:41 +0000 (-0400) Subject: Add test for popcnt to test_caller.py X-Git-Tag: div_pipeline~1198 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3141f822a848e0a6df8055ace1b9f1ff2cf0e630;p=soc.git Add test for popcnt to test_caller.py --- diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index 671360cc..b521108b 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -302,6 +302,8 @@ class ISACaller: if info.write_regs: output_names = create_args(info.write_regs) for name, output in zip(output_names, results): + if isinstance(output, int): + output = SelectableInt(output, 256) if name in info.special_regs: print('writing special %s' % name, output) if name in special_sprs: diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py index 10db874c..2c135361 100644 --- a/src/soc/decoder/isa/test_caller.py +++ b/src/soc/decoder/isa/test_caller.py @@ -238,6 +238,22 @@ class DecoderTestCase(FHDLTestCase): sim = self.run_tst_program(program, initial_regs) self.assertEqual(sim.gpr(2), SelectableInt(0x100000001, 64)) + def test_popcnt(self): + lst = ["popcntb 2, 1", + "popcntw 3, 1", + "popcntd 4, 1" + ] + initial_regs = [0] * 32 + initial_regs[1] = 0xdeadbeefcafec0de + with Program(lst) as program: + sim = self.run_tst_program(program, initial_regs) + self.assertEqual(sim.gpr(2), + SelectableInt(0x605060704070206, 64)) + self.assertEqual(sim.gpr(3), + SelectableInt(0x1800000013, 64)) + self.assertEqual(sim.gpr(4), + SelectableInt(0x2b, 64)) + def test_mtcrf(self):