From: Luis Machado Date: Wed, 8 Aug 2018 07:45:11 +0000 (+0000) Subject: [aarch64] Adjust Falkor's sign extend reg+reg address cost X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=31508b3921cdcc6c2c8c587f76b38b316dc76fc8;p=gcc.git [aarch64] Adjust Falkor's sign extend reg+reg address cost Adjust Falkor's register_sextend cost from 4 to 3. This fixes a testsuite failure in gcc.target/aarch64/extend.c:ldr_sxtw where GCC was generating a sbfiz instruction rather than a load with sign extension. No performance changes. gcc/ChangeLog: 2018-08-08 Luis Machado * config/aarch64/aarch64.c (qdf24xx_addrcost_table) : Set to 3. From-SVN: r263388 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 15baa0ce53d..0f6e466fd98 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-08-08 Luis Machado + + * config/aarch64/aarch64.c (qdf24xx_addrcost_table) + : Set to 3. + 2018-08-07 Richard Sandiford PR target/86838 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 13b5448aca8..1c470cb3d4f 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -329,7 +329,7 @@ static const struct cpu_addrcost_table qdf24xx_addrcost_table = 1, /* pre_modify */ 1, /* post_modify */ 3, /* register_offset */ - 4, /* register_sextend */ + 3, /* register_sextend */ 3, /* register_zextend */ 2, /* imm_offset */ };