From: Abhishek <Abhishek@web>
Date: Fri, 20 Aug 2021 09:38:11 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~366
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=315db192d810175f0ab05237e34d63ac873657ce;p=libreriscv.git

---

diff --git a/about_us.mdwn b/about_us.mdwn
index ecaed2b7a..998431a19 100644
--- a/about_us.mdwn
+++ b/about_us.mdwn
@@ -162,6 +162,12 @@ TODO, Adithya
 * Programming Languages: Verilog, C, C++, Python
 * Availability: ~8-10 hours/week
 
+### [[oa/Abhishek]]
+
+* Interest: HPC, embedded systems, Digital system design 
+* Programming Languages: C, Python, Java, VHDL
+* Availability: ~8-10 hours/week
+