From: Iain Sandoe Date: Sun, 1 Nov 2020 16:27:54 +0000 (+0000) Subject: testsuite, X86 : Add target requires masm_intel to three tests. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=318be202bb7a8b4b1068f7467ad899a9e1f61618;p=gcc.git testsuite, X86 : Add target requires masm_intel to three tests. These tests currently fail on targets without Intel assembler support. gcc/testsuite/ChangeLog: * gcc.target/i386/amxbf16-asmintel-1.c: Require masm_intel. * gcc.target/i386/amxint8-asmintel-1.c: Likewise. * gcc.target/i386/amxtile-asmintel-1.c: Likewise. --- diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c index c2d6074387a..54194e1c5b0 100644 --- a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-bf16 -masm=intel" } */ /* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c index bcfbb3fa5ed..f8c376ae6c4 100644 --- a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-int8 -masm=intel" } */ /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } */ /* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3" } } * diff --git a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c index 88ef612ed14..6c08fec516c 100644 --- a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c +++ b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c @@ -1,4 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ +/* { dg-require-effective-target masm_intel } */ /* { dg-options "-O2 -mamx-tile -masm=intel " } */ /* { dg-final { scan-assembler "ldtilecfg\[ \\t]" } } */ /* { dg-final { scan-assembler "sttilecfg\[ \\t]" } } */