From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Date: Fri, 1 May 2020 21:34:47 +0000 (-0400)
Subject: pan/bi: Disable CSEL4 emit for now
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=31a41bb6a62edf77e9c311064c43fffa1c8fcd8f;p=mesa.git

pan/bi: Disable CSEL4 emit for now

We need proper scheduling for 4-src ops to work, so for now disable
condition fusing so we cap at 3-src at a performance penalty. A bit of a
hack but I'd rather not build hacks into a scheduler that will be
rewritten soon anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
---

diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index a14314b6ad3..945d0190762 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -773,8 +773,12 @@ emit_alu(bi_context *ctx, nir_alu_instr *instr)
                 alu.src[1] = BIR_INDEX_ZERO;
                 alu.src_types[1] = alu.src_types[0];
 
+                /* TODO: Reenable cond fusing when we can split up registers
+                 * when scheduling */
+#if 0
                 bi_fuse_csel_cond(&alu, instr->src[0],
                                 &constants_left, &constant_shift, comps);
+#endif
         } else if (alu.type == BI_BITWISE) {
                 /* Implicit shift argument... at some point we should fold */
                 alu.src[2] = BIR_INDEX_ZERO;