From: Jean-François Nguyen Date: Wed, 31 Jul 2019 12:26:09 +0000 (+0200) Subject: proc_prune: Promote partially redundant assignments. X-Git-Tag: working-ls180~1173^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=320bf2fde55f72e7c0b35a0d9452e3777f13183d;p=yosys.git proc_prune: Promote partially redundant assignments. --- diff --git a/passes/proc/proc_prune.cc b/passes/proc/proc_prune.cc index 9e00b0a8a..b47ee79c2 100644 --- a/passes/proc/proc_prune.cc +++ b/passes/proc/proc_prune.cc @@ -82,14 +82,23 @@ struct PruneWorker if (root) { bool promotable = true; for (auto &bit : lhs) { - if (bit.wire && affected[bit]) { + if (bit.wire && affected[bit] && !assigned[bit]) { promotable = false; break; } } if (promotable) { + RTLIL::SigSpec rhs = sigmap(it->second); + RTLIL::SigSig conn; + for (int i = 0; i < GetSize(lhs); i++) { + RTLIL::SigBit lhs_bit = lhs[i]; + if (lhs_bit.wire && !assigned[lhs_bit]) { + conn.first.append_bit(lhs_bit); + conn.second.append(rhs.extract(i)); + } + } promoted_count++; - module->connect(*it); + module->connect(conn); remove.insert(*it); } }