From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 2 Apr 2020 13:58:30 +0000 (+0100)
Subject: missing info
X-Git-Tag: convert-csv-opcode-to-binary~3003
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3223d7b462d982f6799a6010df08f370b00cb21f;p=libreriscv.git

missing info
---

diff --git a/openpower/isa/branch.mdwn b/openpower/isa/branch.mdwn
index 5b0cfc990..127c37c9a 100644
--- a/openpower/isa/branch.mdwn
+++ b/openpower/isa/branch.mdwn
@@ -1,5 +1,7 @@
 # Branch 
 
+I-Form
+
 * b target_addr (AA=0 LK=0)
 * ba target_addr (AA=1 LK=0)
 * bl target_addr (AA=0 LK=1)
@@ -9,8 +11,13 @@
     else       NIA  <-iea CIA + EXTS(LI || 0b00)
     if LK then LR <-iea  CIA + 4
 
+Special Registers Altered:
+    LR                       (if LK=1)
+
 # Branch Conditional
 
+B-Form
+
 * bc BO,BI,target_addr (AA=0 LK=0)
 * bca BO,BI,target_addr (AA=1 LK=0)
 * bcl BO,BI,target_addr (AA=0 LK=1)
@@ -27,8 +34,14 @@
       else       NIA <-iea CIA + EXTS(BD || 0b00)
     if LK then LR  <-iea  CIA + 4
 
+Special Registers Altered:
+    CTR                    (if BO2=0)
+    LR                       (if LK=1)
+
 # Branch Conditional to Link Register
 
+XL-Form
+
 * bclr BO,BI,BH (LK=0)
 * bclrl BO,BI,BH (LK=1)
 
@@ -43,6 +56,8 @@
 
 # Branch Conditional to Count Register
 
+XL-Form
+
 * bcctr BO,BI,BH (LK=0)
 * bcctrl BO,BI,BH (LK=1)
 
@@ -50,9 +65,13 @@
     if cond_ok then NIA <-iea CTR[0:61] || 0b00
     if LK then LR <- iea CIA + 4
 
+Special Registers Altered:
+    LR                     (if LK=1)
 
 # Branch Conditional to Branch Target Address Register
 
+XL-Form
+
 * bctar BO,BI,BH (LK=0)
 * bctarl BO,BI,BH (LK=1)
 
@@ -65,3 +84,6 @@
     if ctr_ok & cond_ok then NIA <-iea TAR[0:61]  || 0b00
     if LK then LR <-iea  CIA + 4
 
+Special Registers Altered:
+    CTR                    (if BO2=0)
+    LR                       (if LK=1)