From: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Wed, 15 Jun 2016 10:08:24 +0000 (+0000)
Subject: [RTL ifcvt] Allow simple register subregs in noce_convert_multiple_sets
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3256673f86cb878b41da25db3d4785418d6cf2c9;p=gcc.git

[RTL ifcvt] Allow simple register subregs in noce_convert_multiple_sets

	* ifcvt.c (bb_ok_for_noce_multiple_sets): Allow simple lowpart
	register subregs in SET_SRC.

	* gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c: New test.

From-SVN: r237475
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ebc4d6eeca1..6eb52a93975 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-06-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* ifcvt.c (bb_ok_for_noce_multiple_sets): Allow simple lowpart
+	register subregs in SET_SRC.
+
 2016-06-15  Richard Biener  <rguenther@suse.de>
 
 	* tree-vect-stmts.c (vectorizable_store): Remove strided grouped
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 4a277db7dcc..fd2951673fb 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -3339,9 +3339,15 @@ bb_ok_for_noce_convert_multiple_sets (basic_block test_bb,
       rtx src = SET_SRC (set);
 
       /* We can possibly relax this, but for now only handle REG to REG
-	 moves.  This avoids any issues that might come from introducing
-	 loads/stores that might violate data-race-freedom guarantees.  */
-      if (!(REG_P (src) && REG_P (dest)))
+	 (including subreg) moves.  This avoids any issues that might come
+	 from introducing loads/stores that might violate data-race-freedom
+	 guarantees.  */
+      if (!REG_P (dest))
+	return false;
+
+      if (!(REG_P (src)
+	   || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))
+	       && subreg_lowpart_p (src))))
 	return false;
 
       /* Destination must be appropriate for a conditional write.  */
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 679f0225109..e5100ab6892 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2016-06-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c: New test.
+
 2016-06-15  Richard Biener  <rguenther@suse.de>
 
 	* gcc.dg/vect/slp-45.c: New testcase.
diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c
new file mode 100644
index 00000000000..ac6ffdcf8de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-ce1" } */
+
+/* Check that the inner if is transformed into CSELs.  */
+
+int
+foo (int *x, int *z, int a)
+{
+  int b = 0;
+  int c = 0;
+  int d = 0;
+  int i;
+
+  for (i = 0; i < a; i++)
+    {
+      if (x[i] < c)
+	{
+	  b = z[i];
+	  if (c < b)
+	    {
+	      c = b;
+	      d = i;
+	    }
+	}
+    }
+
+  return c + d;
+}
+
+/* { dg-final { scan-rtl-dump "if-conversion succeeded through noce_convert_multiple_sets" "ce1" } } */