From: lkcl <lkcl@web>
Date: Thu, 24 Jun 2021 05:03:15 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~719
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=326681243530811d8f2311fd206cc778307231e8;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index bd9410030..16615872e 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -142,7 +142,7 @@ an alternative table meaning for [[sv/svp64]] mode.  The following modes make se
 Also, given that FFT, DCT and other related algorithms
 are of such high importance in so many areas of Computer
 Science, a special "bit-reverse" mode has been added which
-allows the immediate offset to be multiplied by an element sequence such as ```0 4 2 6 1 5 3 7``` rather than ```0 1 2 .... 7````.
+allows the immediate offset to be multiplied by an element sequence such as ```0 4 2 6 1 5 3 7``` rather than ```0 1 2 .... 7```.
 This is generated
 automatically rather than needing to be created programmatically
 using Vectorised Indexed Mode.