From: Luke Kenneth Casson Leighton Date: Tue, 4 Feb 2020 18:11:25 +0000 (+0000) Subject: remove comments, sort out string name, add __init__.pys X-Git-Tag: ls180-24jan2020~281 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=326ce92262bb16955b3c67f7e81f81f4ce2ceebb;p=ieee754fpu.git remove comments, sort out string name, add __init__.pys --- diff --git a/src/ieee754/part_cmp/__init__.py b/src/ieee754/part_cmp/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/src/ieee754/part_cmp/equal_ortree.py b/src/ieee754/part_cmp/equal_ortree.py index d9ed392e..24c88cf3 100644 --- a/src/ieee754/part_cmp/equal_ortree.py +++ b/src/ieee754/part_cmp/equal_ortree.py @@ -17,7 +17,8 @@ from nmigen import Signal, Module, Elaboratable, Cat, C, Mux, Repl from nmigen.cli import main from ieee754.part_mul_add.partpoints import PartitionPoints -from eq_combiner import Twomux +from ieee754.part_cmp.experiments.eq_combiner import Twomux + class PartitionedEq(Elaboratable): @@ -37,25 +38,6 @@ class PartitionedEq(Elaboratable): m = Module() comb = m.d.comb - # ok first thing to note, before reading this (read the wiki page - # first), according to boolean algebra, these two are equivalent: - # (~[~eq0, ~eq1, ~eq2].bool()) is the same as (eq0 AND eq1 AND eq2) - # where bool() is the *OR* of all bits in the list. - # - # given that ~eqN is neN (not equal), we first create a series - # of != comparisons on the partitions, then chain the relevant - # ones together depending on partition points, BOOL those together - # and invert the result. - # - # the outer loop is on the partition value. the preparation phase - # (idx array) is to work out how and when the eqs (ne's) are to be - # chained together. finally an inner loop - one per bit - grabs - # each chain, on a per-output-bit basis. - # - # the result is that for each partition-point permutation you get - # a different set of output results for each bit. it's... messy - # but functional. - # make a series of "not-eqs", splitting a and b into partition chunks nes = Signal(self.mwidth, reset_less=True) nel = [] @@ -63,7 +45,7 @@ class PartitionedEq(Elaboratable): start = 0 for i in range(len(keys)): end = keys[i] - nel.append(self.a[start:end] != self.b[start:end]) # see bool below + nel.append(self.a[start:end] != self.b[start:end]) start = end # for next time round loop comb += nes.eq(Cat(*nel)) @@ -75,7 +57,7 @@ class PartitionedEq(Elaboratable): prevresult = nes[-1] for bit in range(self.mwidth-1, 0, -1): # counts down from mwidth-1 to 1 - m.submodules["mux{}".format(bit)] = mux = Twomux() + m.submodules["mux%d" % bit] = mux = Twomux() comb += mux.ina.eq(prevresult) comb += mux.inb.eq(0) comb += mux.sel.eq(~part_points[bit-1])